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Hwang, Wei
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1

Layer-by-Layer Polymer Functionalization Improves Nanoparti..:

Pickering, Andrew J. ; Lamson, Nicholas G. ; Marand, Michael H....
ACS Nano.  , 2023
Link: https://doi.org/10.1021/..
 
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2

Memory-Centric Fusion-based CNN Accelerator with 3D-NoC and..:

, In: 2022 19th International SoC Design Conference (ISOCC),
Lu, Wei ; Ge, Pei-Yu ; Huang, Po-Tsang.. - p. 169-170 , 2022
Link: https://doi.org/10.1109/..
 
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3

Energy-Efficient Accelerator Design With Tile-Based Row-Ind..:

Huang, Po-Tsang ; Wu, I-Chen ; Lo, Chin-Yang.
IEEE Open Journal of Circuits and Systems.  2 (2021)  - p. 131-143 , 2021
Link: https://doi.org/10.1109/..
 
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4

Energy-Efficient Accelerator Design with 3D-SRAM and Hierar..:

, In: 2020 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS),
Lo, Chin-Yang ; Huang, Po-Tsang ; Hwang, Wei - p. 320-323 , 2020
Link: https://doi.org/10.1109/..
 
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5

28nm 0.3V 1W2R Sub-Threshold FIFO Memory for Multi-Sensor I..:

, In: 2019 32nd IEEE International System-on-Chip Conference (SOCC),
Tseng, Huan-Jan ; Huang, Po-Tsang ; Wu, Shang-Lin... - p. 248-253 , 2019
Link: https://doi.org/10.1109/..
 
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6

Digital Buck Converter With Switching Loss Reduction Scheme..:

Wu, Chung-Shiang ; Lee, Hui-Hsuan ; Chen, Po-Hung.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  25 (2017)  2 - p. 783-787 , 2017
Link: https://doi.org/10.1109/..
 
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7

A double-sided, single-chip integration scheme using throug..:

Chang, Chih-Wei ; Chou, Lei-Chun ; Huang, Po-Tsang...
Biomedical Microdevices.  17 (2015)  1 - p. , 2015
Link: https://doi.org/10.1007/..
 
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8

PVT-aware digital controlled voltage regulator design for u..:

, In: 2014 27th IEEE International System-on-Chip Conference (SOCC),
Wu, Pei-Chen ; Kuo, Yi-Ping ; Wu, Chung-Shiang... - p. 136-139 , 2014
Link: https://doi.org/10.1109/..
 
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9

A 55nm 0.55v 6T SRAM with variation-tolerant dual-tracking ..:

, In: Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design,
Lin, Yi-Wei ; Yang, Hao-I ; Lin, Geng-Cing... - p. 79-84 , 2012
Link: https://dl.acm.org/doi/1..
 
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10

All Digital Linear Voltage Regulator for Super- to Near-Thr..:

Hsieh, Wei-Chih ; Hwang, Wei
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  20 (2012)  6 - p. 989-1001 , 2012
Link: https://doi.org/10.1109/..
 
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11

Impacts of NBTI/PBTI and Contact Resistance on Power-Gated ..:

Yang, Hao-I ; Hwang, Wei ; Chuang, Ching-Te
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  19 (2011)  7 - p. 1192-1204 , 2011
Link: https://doi.org/10.1109/..
 
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12

Near-/sub-threshold DLL-based clock generator with PVT-awar..:

, In: Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design,
Chang, Ming-Hung ; Hsieh, Chung-Ying ; Chen, Mei-Wei. - p. 15-20 , 2011
Link: https://dl.acm.org/doi/1..
 
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13

A 1kb 9T subthreshold SRAM with bit-interleaving scheme in ..:

, In: Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design,
Chang, Ming-Hung ; Chiu, Yi-Te ; Lai, Shu-Lin. - p. 291-296 , 2011
Link: https://dl.acm.org/doi/1..
 
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14

Adaptive Power Control Technique on Power-Gated Circuitries:

Hsieh, Wei-Chih ; Hwang, Wei
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  19 (2011)  7 - p. 1167-1180 , 2011
Link: https://doi.org/10.1109/..
 
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15

Impacts of gate-oxide breakdown on power-gated SRAM:

Yang, Hao-I ; Hwang, Wei ; Chuang, Ching-Te
Microelectronics Journal.  42 (2011)  1 - p. 101-112 , 2011
Link: https://doi.org/10.1016/..
 
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