IIZUKA, Tetsuya
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1

A Unified OTP and PUF Exploiting Post-Program Current on St..:

, In: 2024 IEEE International Symposium on Circuits and Systems (ISCAS),
 
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2

A Fractional-N Ring PLL Using Harmonic-Mixer-Based Dual-Fee..:

Osada, Masaru ; Xu, Zule ; Yang, Zunsong.
IEEE Journal of Solid-State Circuits.  59 (2024)  7 - p. 2171-2184 , 2024
 
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3

A Single Ring-Oscillator-Based Test Structure for Timing Ch..:

Zhang, Haoming ; Li, Shuowei ; Iizuka, Tetsuya
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  32 (2024)  5 - p. 938-951 , 2024
 
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4

150GHz Fundamental Oscillator Utilizing Transmission-Line-B..:

KANO, Sota ; IIZUKA, Tetsuya
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences.  E107.A (2024)  5 - p. 741-745 , 2024
 
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6

Investigation and Improvement on Self-Dithered MASH ΔΣ Modu..:

ZHU, Yuyang ; YANG, Zunsong ; OSADA, Masaru..
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences.  E107.A (2024)  5 - p. 746-750 , 2024
 
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7

A-SSCC 2023 Returned to In-Person Format, With Increased Hi..:

Takeuchi, Ken ; Tsai, Pei-Yun ; Iizuka, Tetsuya...
IEEE Solid-State Circuits Magazine.  16 (2024)  2 - p. 133-137 , 2024
 
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8

A 6-GHz 78-fsRMS Double-Sampling PLL With Low-Ripple Bootst..:

Ren, Hongyu ; Yang, Zunsong ; Huang, Yunbo...
IEEE Microwave and Wireless Technology Letters.  34 (2024)  5 - p. 548-551 , 2024
 
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11

Dynamic Circuit Characterization and a Single Ring-Oscillat..:

, In: 2023 International Conference on IC Design and Technology (ICICDT),
 
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12

A 1-5GHz Inverter-Based Phase Interpolator with All Digital..:

, In: 2023 International Conference on IC Design and Technology (ICICDT),
Zhu, Yuyang ; Yang, Zunsong ; Cheng, Zhenyu... - p. 88-91 , 2023
 
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13

A 79.2-μW 19.5-kHz-BW 94.8-dB-SNDR Fully Dynamic DT ΔΣ ADC ..:

Matsuoka, Akira ; Kumano, Yo ; Nezuka, Tomohiro..
IEEE Transactions on Circuits and Systems II: Express Briefs.  70 (2023)  8 - p. 2759-2763 , 2023
 
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