Jaime, Francisco J.
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4

Reproducible Summation Under HUB Format:

, In: 2019 IEEE 26th Symposium on Computer Arithmetic (ARITH),
 
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High-Speed Algorithms and Architectures for Range Reduction..:

Jaime, Francisco J. ; Sanchez, Miguel A. ; Hormigo, Javier..
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  19 (2011)  3 - p. 512-516 , 2011
 
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Pipelined Architecture for Additive Range Reduction:

Jaime, Francisco J. ; Villalba, Julio ; Hormigo, Javier.
Journal of Signal Processing Systems.  53 (2008)  1-2 - p. 103-112 , 2008
 
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"DOUBLE PREGNANCY IN A UTERUS BICORNIS" ADENOMYOSIS:

JAIME, FRANCISCO ; CRISTOBAL, SEVERIANO G.
Obstetrical & Gynecological Survey.  1 (1946)  4 - p. 574 , 1946
 
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