I agree that this site is using cookies. You can find further informations here.
X
Jou, Shyh-Jye Jerry
90  results:
Search for persons X
?
1

Low Routing Complexity Multiframe Pipelined LDPC Decoder Ba..:

Lopez Davila, Henry ; Wu, Tsung-Han ; Jou, Shyh-Jye Jerry..
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  31 (2023)  1 - p. 29-42 , 2023
Link: https://doi.org/10.1109/..
 
?
2

A Digital Frequency-Dependent I/Q Imbalance and Group Delay..:

Jen, Chih-Wei ; Liu, Hung-Chih ; Huang, Zheng-Chun..
IEEE Journal on Emerging and Selected Topics in Circuits and Systems.  13 (2023)  2 - p. 461-475 , 2023
Link: https://doi.org/10.1109/..
 
?
3

Joint Digital Online Compensation of TX and RX Time-Varying..:

Liu, Hung-Chih ; Huang, Zheng-Chun ; Doan, Ngoc-Giang..
IEEE Transactions on Circuits and Systems I: Regular Papers.  69 (2022)  2 - p. 919-932 , 2022
Link: https://doi.org/10.1109/..
 
?
4

A 75-Gb/s/mm2 and Energy-Efficient LDPC Decoder Based on a ..:

Lopez, Henry ; Chan, Hsun-Wei ; Chiu, Kang-Lun..
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  28 (2020)  4 - p. 926-939 , 2020
Link: https://doi.org/10.1109/..
 
?
5

Golay-Correlator Window-Based Noise Cancellation Equalizati..:

Wu, Chih-Feng ; Liu, Wei-Chang ; Tsui, Chia-Chun...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  24 (2016)  11 - p. 3323-3333 , 2016
Link: https://doi.org/10.1109/..
 
?
6

A Multi-Bit Near-RRAM based Computing Macro with Highly Com..:

, In: 2024 Design, Automation & Test in Europe Conference & Exhibition (DATE),
Lin, Kuan-Chih ; Zuo, Hao ; Wang, Hsiang-Yu... - p. 1-6 , 2024
Link: https://doi.org/10.23919..
 
?
7

Online Self-Adaptive Estimation and Compensation Design for..:

, In: 2024 IEEE International Symposium on Circuits and Systems (ISCAS),
Lee, Chia-Jung ; Tu, Chung-Lun ; Jou, Shyh-Jye - p. 1-5 , 2024
Link: https://doi.org/10.1109/..
 
?
8

Channel Estimation and Equalization Design with SNR Decisio..:

, In: 2024 IEEE International Symposium on Circuits and Systems (ISCAS),
Liao, Feng-Ju ; Tu, Chung-Lun ; Jou, Shyh-Jye - p. 1-5 , 2024
Link: https://doi.org/10.1109/..
 
?
9

On Automating Finger-Cap Array Synthesis with Optimal Paras..:

, In: Proceedings of the 28th Asia and South Pacific Design Automation Conference,
Chiang, Cheng-Yu ; Hu, Chia-Lin ; Lin, Mark Po-Hung... - p. 352-357 , 2023
Link: https://dl.acm.org/doi/1..
 
?
10

Offline and Time-variant EVD-based Closed-loop Digital Pred..:

, In: 2023 IEEE International Symposium on Circuits and Systems (ISCAS),
Tu, Chung-Lun ; Chang, Chin-Ming ; Jou, Shyh-Jye - p. 1-5 , 2023
Link: https://doi.org/10.1109/..
 
?
11

Low-Complexity Pseudo Direct Learning Digital Pre-Distortio..:

, In: 2022 IEEE International Symposium on Circuits and Systems (ISCAS),
Lu, Shen-Zhe ; Xue, Nai-Cheng ; Liu, Hung-Chih.. - p. 1541-1545 , 2022
Link: https://doi.org/10.1109/..
 
?
12

Hardware-Robust In-RRAM-Computing for Object Detection:

Chiang, Yu-Hsiang ; Ni, Cheng-En ; Sung, Yun...
IEEE Journal on Emerging and Selected Topics in Circuits and Systems.  12 (2022)  2 - p. 547-556 , 2022
Link: https://doi.org/10.1109/..
 
?
13

Design of a mmWave Digital Baseband Receiver Integrated wit..:

, In: 2022 IEEE International Symposium on Circuits and Systems (ISCAS),
Chiu, Kang-Lun ; Chan, Hsun-Wei ; Chiu, Hsuan-Ping... - p. 742-746 , 2022
Link: https://doi.org/10.1109/..
 
?
14

Compressive Sensing Based Hardware Design for Channel Estim..:

, In: 2022 IEEE International Symposium on Circuits and Systems (ISCAS),
Tu, Chung-Lun ; Lin, Tse-Yuan ; Chiu, Kang-Lun.. - p. 2496-2500 , 2022
Link: https://doi.org/10.1109/..
 
?
15

An 1-bit by 1-bit High Parallelism In-RRAM Macro with Co-Tr..:

, In: 2022 International Symposium on VLSI Design, Automation and Test (VLSI-DAT),
Liu, Chi ; Li, Shao- Tzu ; Pan, Tong-Lin... - p. 1-4 , 2022
Link: https://doi.org/10.1109/..
 
1-15