Kwon, Yongkee
20  results:
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1

IANUS: Integrated Accelerator based on NPU-PIM Unified Memo..:

, In: Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3,
 
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2

A 1ynm 1.25V 8Gb 16Gb/s/Pin GDDR6-Based Accelerator-in-Memo..:

Kwon, Daehan ; Lee, Seongju ; Kim, Kyuyoung...
IEEE Journal of Solid-State Circuits.  58 (2023)  1 - p. 291-302 , 2023
 
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4

Holistic approaches to memory solutions for the Autonomous ..:

, In: 2022 IEEE International Symposium on Circuits and Systems (ISCAS),
Shim, Daeyong ; Jeong, Chunseok ; Lee, Euncheol... - p. 351-355 , 2022
 
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5

A 1ynm 1.25V 8Gb, 16Gb/s/pin GDDR6-based Accelerator-in-Mem..:

, In: 2022 IEEE International Solid- State Circuits Conference (ISSCC),
Lee, Seongju ; Kim, Kyuyoung ; Oh, Sanghoon... - p. 1-3 , 2022
 
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6

System Architecture and Software Stack for GDDR6-AiM:

, In: 2022 IEEE Hot Chips 34 Symposium (HCS),
 
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7

Near data acceleration with concurrent host access:

, In: Proceedings of the ACM/IEEE 47th Annual International Symposium on Computer Architecture,
Cho, Benjamin Y. ; Kwon, Yongkee ; Lym, Sangkug. - p. 818-831 , 2020
 
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8

Near Data Acceleration with Concurrent Host Access:

, In: 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA),
Cho, Benjamin Y. ; Kwon, Yongkee ; Lym, Sangkug. - p. 818-831 , 2020
 
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9

A distributed multi-GPU system for fast graph processing:

Jia, Zhihao ; Kwon, Yongkee ; Shipman, Galen...
Proceedings of the VLDB Endowment.  11 (2017)  3 - p. 297-310 , 2017
 
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10

A distributed multi-GPU system for fast graph processing:

Jia, Zhihao ; Kwon, Yongkee ; Shipman, Galen...
Proceedings of the VLDB Endowment.  11 (2017)  3 - p. 297-310 , 2017
 
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11

Accelerating Linked-list Traversal Through Near-Data Proces..:

, In: Proceedings of the 2016 International Conference on Parallel Architectures and Compilation,
Hong, Byungchul ; Kim, Gwangsun ; Ahn, Jung Ho... - p. 113-124 , 2016
 
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12

Multiple clone row DRAM : a low latency and area optimiz..:

, In: Proceedings of the 42nd Annual International Symposium on Computer Architecture,
Choi, Jungwhan ; Shin, Wongyu ; Jang, Jaemin... - p. 223-234 , 2015
 
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13

Multiple clone row DRAM: a low latency and area optimized D..:

Choi, Jungwhan ; Shin, Wongyu ; Jang, Jaemin...
ACM SIGARCH Computer Architecture News.  43 (2015)  3S - p. 223-234 , 2015
 
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