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Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition ,
2
A universal macro block mapping scheme for arithmetic circu..:
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Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition ,
3
A coupling area reduction technique applying ODC shifting:
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Proceedings of the 24th edition of the great lakes symposium on VLSI ,
4
On macro-fault : a new fault model, its implications on ..:
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Proceedings of the Conference on Design, Automation and Test in Europe ,
6
Almost every wire is removable : a modeling and solution..:
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Proceedings of the 16th Asia and South Pacific Design Automation Conference ,
8
On applying erroneous clock gating conditions to further cu..:
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Proceedings of the 47th Design Automation Conference ,
10
ECR : a low complexity generalized error cancellation re..:
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Proceedings of the 20th symposium on Great lakes symposium on VLSI ,
11
Logic synthesis for low power using clock gating and rewiri..:
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Proceedings of the twenty-fifth annual ACM symposium on Parallelism in algorithms and architectures ,
13
Nonclairvoyant sleep management and flow-time scheduling on..:
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