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Lee, Tai-Cheng
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1

A Sub-Baud-Rate Wireline Receiver With One-Tap DFE:

Yang, Yu-Hong ; Lee, Tai-Cheng
IEEE Journal of Solid-State Circuits.  , 2024
Link: https://doi.org/10.1109/..
 
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2

A 6.0–11.0 Gb/s Reference-Less Sub-Baud-Rate Linear CDR Wit..:

Yang, Yu-Hong ; Tzou, Mou ; Lee, Tai-Cheng
IEEE Transactions on Circuits and Systems II: Express Briefs.  70 (2023)  2 - p. 386-390 , 2023
Link: https://doi.org/10.1109/..
 
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3

A 0.9-V 50-MS/s 67.3-dB-SNDR SAR-ISDM ADC With an Oscillato..:

Chan, Yen-Chun ; Chang, Che-Wei ; Lee, Tai-Cheng
IEEE Transactions on Circuits and Systems II: Express Briefs.  70 (2023)  9 - p. 3263-3267 , 2023
Link: https://doi.org/10.1109/..
 
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4

A 511-$\mu$W 89-dB-SNDR Asynchronous SAR-ISDM ADC With Nois..:

Chang, Hao-Hsuan ; Chen, Ci-Ren ; Lee, Tai-Cheng
IEEE Journal of Solid-State Circuits.  , 2023
Link: https://doi.org/10.1109/..
 
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5

Path-Based Pre-Routing Timing Prediction for Modern Very La..:

, In: 2022 23rd International Symposium on Quality Electronic Design (ISQED),
Chen, Li-Wei ; Sui, Yao-Nien ; Lee, Tai-Cheng... - p. 1-6 , 2022
Link: https://doi.org/10.1109/..
 
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6

A Reinforcement Learning Agent for Obstacle-Avoiding Rectil..:

, In: Proceedings of the 2022 International Symposium on Physical Design,
Chen, Po-Yan ; Ke, Bing-Ting ; Lee, Tai-Cheng... - p. 107-115 , 2022
Link: https://dl.acm.org/doi/1..
 
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7

An Asynchronous Zero-Crossing-Based Incremental Delta-Sigma..:

, In: 2022 International Symposium on VLSI Design, Automation and Test (VLSI-DAT),
Lai, Yen-Po ; Chang, Hao-Hsuan ; Lee, Tai-Cheng - p. 1-4 , 2022
Link: https://doi.org/10.1109/..
 
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8

A Single-Channel 1-GS/s 7.48-ENOB Parallel Conversion Pipel..:

Chang, Hao-Hsuan ; Lin, Tung-Cheng ; Lee, Tai-Cheng
IEEE Transactions on Circuits and Systems II: Express Briefs.  69 (2022)  4 - p. 2021-2025 , 2022
Link: https://doi.org/10.1109/..
 
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9

A Type-3 FMCW Radar Synthesizer with Wide Frequency Modulat..:

, In: 2022 IEEE International Symposium on Circuits and Systems (ISCAS),
Chen, Cheng-Tang ; Yang, Yu-Hong ; Lee, Tai-Cheng - p. 2750-2753 , 2022
Link: https://doi.org/10.1109/..
 
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10

25.6 A 5.25GHz Subsampling PLL with a VCO-Phase-Noise Suppr..:

, In: 2020 IEEE International Solid- State Circuits Conference - (ISSCC),
Ting, Hsiu-Hsien ; Lee, Tai-Cheng - p. 390-392 , 2020
Link: https://doi.org/10.1109/..
 
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11

iTPlace : machine learning-based delay-aware transistor ..:

, In: Proceedings of the 39th International Conference on Computer-Aided Design,
Lee, Tai-Cheng ; Yang, Cheng-Yen ; Li, Yih-Lang - p. 1-8 , 2020
Link: https://dl.acm.org/doi/1..
 
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12

Analysis and Design of a Self-Charged Crystal Oscillator wi..:

, In: 2020 International Symposium on VLSI Design, Automation and Test (VLSI-DAT),
Cheng, Hsiang-Chun ; Yang, Yu-Hong ; Lee, Tai-Cheng - p. 1-4 , 2020
Link: https://doi.org/10.1109/..
 
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13

Incremental Timing-Driven Placement With Approximated Signo..:

Lee, Tai-Cheng ; Li, Yih-Lang
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  27 (2019)  10 - p. 2434-2446 , 2019
Link: https://doi.org/10.1109/..
 
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14

A SAR-Assisted Continuous-Time Incremental ΣΔ ADC With Firs..:

, In: 2019 IEEE 13th International Conference on ASIC (ASICON),
Hsieh, Yu-Lun ; Lee, Tai-Cheng - p. 1-4 , 2019
Link: https://doi.org/10.1109/..
 
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15

F2: FinFETs & FDSOI — A mixed signal circuit designer's per..:

, In: 2018 IEEE International Solid-State Circuits Conference - (ISSCC),
Srinivasan, Venkatesh ; Le Tuai, Stephane ; Lee, Tai-Cheng - p. 505-507 , 2018
Link: https://doi.org/10.1109/..
 
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