Lu, Shih-Lien
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1

VLSI Design and Test View of Computer Security:

, In: 2023 International VLSI Symposium on Technology, Systems and Applications (VLSI-TSA/VLSI-DAT),
Lu, Shih-Lien - p. 1-4 , 2023
 
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3

CompAcc: Efficient Hardware Realization for Processing Comp..:

, In: 2020 IEEE Asian Solid-State Circuits Conference (A-SSCC),
Ji, Zexi ; Jung, Wanyeong ; Woo, Jongchan... - p. 1-4 , 2020
 
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4

A foundry's view of hardware security:

, In: 2018 International Symposium on VLSI Design, Automation and Test (VLSI-DAT),
Lu, Shih-Lien - p. 1-1 , 2018
 
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5

Flexible auto-refresh: enabling scalable and energy-efficie..:

Bhati, Ishwar ; Chishti, Zeshan ; Lu, Shih-Lien.
ACM SIGARCH Computer Architecture News.  43 (2015)  3S - p. 235-246 , 2015
 
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6

Flexible auto-refresh : enabling scalable and energy-eff..:

, In: Proceedings of the 42nd Annual International Symposium on Computer Architecture,
Bhati, Ishwar ; Chishti, Zeshan ; Lu, Shih-Lien. - p. 235-246 , 2015
 
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7

Bringing Modern Hierarchical Memory Systems Into Focus :..:

, In: Proceedings of the 2015 International Symposium on Memory Systems,
Tschirhart, Paul ; Stevens, Jim ; Chishti, Zeshan.. - p. 179-190 , 2015
 
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8

Improving DRAM latency with dynamic asymmetric subarray:

, In: Proceedings of the 48th International Symposium on Microarchitecture,
Lu, Shih-Lien ; Lin, Ying-Chen ; Yang, Chia-Lin - p. 255-266 , 2015
 
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9

Recycled error bits : energy-efficient architectural sup..:

, In: Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis,
Nathan, Ralph ; Anthonio, Bryan ; Lu, Shih-Lien... - p. 117-127 , 2014
 
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10

Author retrospective for bloom filtering cache misses for a..:

, In: ACM International Conference on Supercomputing 25th Anniversary Volume,
 
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11

Session details: Emerging memory technologies:

, In: Proceedings of the International Conference on Computer-Aided Design,
 
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12

Reducing cache and TLB power by exploiting memory region an..:

Fang, Zhen ; Zhao, Li ; Jiang, Xiaowei...
Journal of Systems Architecture.  59 (2013)  6 - p. 279-295 , 2013
 
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14

Design for test and reliability in ultimate CMOS:

, In: Proceedings of the Conference on Design, Automation and Test in Europe,
 
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15

Scaling the "memory wall":

, In: Proceedings of the International Conference on Computer-Aided Design,
Lu, Shih-Lien ; Karnik, Tanay ; Srinivasa, Ganapati... - p. 271-272 , 2012
 
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