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Mahale, Gopinath
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1

Optimizations for Very Long and Sparse Vector Operations on..:

, In: Lecture Notes in Computer Science; High Performance Computing,
Mahale, Gopinath ; Limbasiya, Tejas ; Aleem, Muhammad Asad... - p. 472-485 , 2023
Link: https://doi.org/10.1007/..
 
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2

IKW: Inter-Kernel Weights for Power Efficient Edge Computin:

Udupa, Pramod ; Mahale, Gopinath ; Chandrasekharan, Kiran Kolar.
IEEE Access.  8 (2020)  - p. 90450-90464 , 2020
Link: https://doi.org/10.1109/..
 
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3

Accelerating Depthwise Convolution and Pooling Operations o..:

, In: 2020 IEEE International Symposium on Circuits and Systems (ISCAS),
Udupa, Pramod ; Mahale, Gopinath ; Chandrasekharan, Kiran Kolar. - p. 1-5 , 2020
Link: https://doi.org/10.1109/..
 
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4

OpenCL-Based FPGA Design to Accelerate the Nodal Discontinu..:

, In: 2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM),
Kenter, Tobias ; Mahale, Gopinath ; Alhaddad, Samer... - p. 189-196 , 2018
Link: https://doi.org/10.1109/..
 
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5

VOP: Architecture of a Processor for Vector Operations in O..:

, In: 2016 29th International Conference on VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID),
Mahale, Gopinath ; Bhatia, Eshan ; Nandy, Soumitra K.. - p. 391-396 , 2016
Link: https://doi.org/10.1109/..
 
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6

On the Modeling of Error Functions as High Dimensional Land..:

Julius ; Mahale, Gopinath ; T., Sumana.
http://arxiv.org/abs/1607.06011.  , 2016
Link: http://arxiv.org/abs/160..
 
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7

Eigen values and vectors computations on Virtex-5 FPGA plat..:

, In: 3rd International Conference on Advances in Recent Technologies in Communication and Computing (ARTCom 2011),
Gopinath Vasanth Mahale ; Bartakke, Prashant P. - p. 20-24 , 2011
Link: https://doi.org/10.1049/..
 
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8

IKW: Inter-Kernel Weights for Power Efficient Edge Computin:

Pramod Udupa ; Gopinath Mahale ; Kiran Kolar Chandrasekharan.
https://ieeexplore.ieee.org/document/9090142/.  , 2020
Link: https://doi.org/10.1109/..
 
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