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Marco Ottavi
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1

Exploring Genomic Sequence Alignment for Improving Side-Cha..:

, In: Computer Security – ESORICS 2023; Lecture Notes in Computer Science,
Uchoa, Heitor ; Arora, Vipul ; Vermoen, Dennis.. - p. 203-221 , 2024
Link: https://doi.org/10.1007/..
 
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2

Neutron Radiation Tests of the NEORV32 RISC-V SoC on Flash-..:

, In: 2023 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT),
Bohmer, Kevin ; Forlin, Bruno ; Cazzaniga, Carlo... - p. 1-6 , 2023
Link: https://doi.org/10.1109/..
 
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3

DEV-PIM: Dynamic Execution Validation with Processing-in-Me..:

, In: 2023 IEEE European Test Symposium (ETS),
Bolat, Alperen ; Tugrul, Yahya Can ; Celik, Seyyid Hikmet... - p. 1-6 , 2023
Link: https://doi.org/10.1109/..
 
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4

Towards Dependable RISC-V Cores for Edge Computing Devices:

, In: 2023 IEEE 29th International Symposium on On-Line Testing and Robust System Design (IOLTS),
Nikiema, Pegdwende Romaric ; Palumbo, Alessandro ; Aasma, Allan... - p. 1-7 , 2023
Link: https://doi.org/10.1109/..
 
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5

An unprotected RISC-V Soft-core processor on an SRAM FPGA: ..:

, In: 2023 IEEE European Test Symposium (ETS),
Forlin, Bruno Endres ; van Huffelen, Wouter ; Cazzaniga, Carlo... - p. 1-6 , 2023
Link: https://doi.org/10.1109/..
 
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6

Built-in Software Obfuscation for Protecting Microprocessor..:

, In: 2023 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT),
Palumbo, Alessandro ; Ottavi, Marco ; Cassano, Luca - p. 1-6 , 2023
Link: https://doi.org/10.1109/..
 
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7

Improving the Detection of Hardware Trojan Horses in Microp..:

, In: 2023 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT),
Palumbo, Alessandro ; Cassano, Luca ; Reviriego, Pedro. - p. 1-6 , 2023
Link: https://doi.org/10.1109/..
 
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8

Is RISC-V ready for Space? A Security Perspective:

, In: 2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT),
Cassano, Luca ; Mascio, Stefano Di ; Palumbo, Alessandro... - p. 1-6 , 2022
Link: https://doi.org/10.1109/..
 
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9

Preventing Soft Errors and Hardware Trojans in RISC-V Cores:

, In: 2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT),
Annink, Edian B. ; Rauwerda, Gerard ; Hakkennes, Edwin... - p. 1-6 , 2022
Link: https://doi.org/10.1109/..
 
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10

Introducing the Editorial Board [The Editor's Desk]:

Sheu, Bing ; Kao, Shao-Ku ; Jiang, Xiaoning...
IEEE Nanotechnology Magazine.  16 (2022)  5 - p. 2-8 , 2022
Link: https://doi.org/10.1109/..
 
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11

Processor Security: Detecting Microarchitectural Attacks vi..:

Arikan, Kerem ; Palumbo, Alessandro ; Cassano, Luca...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  30 (2022)  7 - p. 938-951 , 2022
Link: https://doi.org/10.1109/..
 
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12

RISC-Vlim, a RISC-V Framework for Logic-in-Memory Architect..:

Coluccio, Andrea ; Ieva, Antonia ; Riente, Fabrizio...
Electronics.  11 (2022)  19 - p. 2990 , 2022
Link: https://doi.org/10.3390/..
 
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13

Novel Applications Enabled by Memristors [Guest Editorial]:

Kvatinsky, Shahar ; Ottavi, Marco
IEEE Nanotechnology Magazine.  16 (2022)  2 - p. 3-3 , 2022
Link: https://doi.org/10.1109/..
 
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14

Low power memristive gas sensor architectures with improved..:

Khandelwal, Saurabh ; Ottavi, Marco ; Martinelli, Eugenio.
Journal of Computational Electronics.  21 (2022)  4 - p. 1005-1016 , 2022
Link: https://doi.org/10.1007/..
 
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15

Yield Evaluation of Faulty Memristive Crossbar Array-based ..:

, In: 2022 IEEE 28th International Symposium on On-Line Testing and Robust System Design (IOLTS),
Bala, Anu ; Khandelwal, Saurabh ; Jabir, Abusaleh. - p. 1-5 , 2022
Link: https://doi.org/10.1109/..
 
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