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Mattheakis, Pavlos M.
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1

Timing-Driven and Placement-Aware Multibit Register Composi..:

Seitanidis, Ioannis ; Dimitrakopoulos, Giorgos ; Mattheakis, Pavlos M...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.  38 (2019)  8 - p. 1501-1514 , 2019
Link: https://doi.org/10.1109/..
 
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2

Accelerating Intercommunication in Highly Parallel Systems:

Tampouratzis, Nikolaos ; Mattheakis, Pavlos M. ; Papaefstathiou, Ioannis
ACM Transactions on Architecture and Code Optimization.  13 (2016)  4 - p. 1-25 , 2016
Link: https://doi.org/10.1145/..
 
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3

Accelerating Intercommunication in Highly Parallel Systems:

Tampouratzis, Nikolaos ; Mattheakis, Pavlos M. ; Papaefstathiou, Ioannis
ACM Transactions on Architecture and Code Optimization (TACO).  13 (2016)  4 - p. 1-25 , 2016
Link: https://dl.acm.org/doi/1..
 
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4

Skew Bounded Buffer Tree Resynthesis For Clock Power Optimi..:

, In: Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
Roy, Subhendu ; Pan, David Z. ; Mattheakis, Pavlos M.... - p. 87-90 , 2015
Link: https://dl.acm.org/doi/1..
 
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5

Clock tree resynthesis for multi-corner multi-mode timing c..:

, In: Proceedings of the 2014 on International symposium on physical design,
Roy, Subhendu ; Mattheakis, Pavlos M. ; Masse-Navette, Laurent. - p. 69-76 , 2014
Link: https://dl.acm.org/doi/1..
 
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6

Significantly reducing MPI intercommunication latency and p..:

Mattheakis, Pavlos M. ; Papaefstathiou, Ioannis
ACM Transactions on Architecture and Code Optimization.  9 (2013)  4 - p. 1-25 , 2013
Link: https://doi.org/10.1145/..
 
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7

Significantly reducing MPI intercommunication latency and p..:

Mattheakis, Pavlos M. ; Papaefstathiou, Ioannis
ACM Transactions on Architecture and Code Optimization (TACO).  9 (2013)  4 - p. 1-25 , 2013
Link: https://dl.acm.org/doi/1..
 
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8

Hardware primitives for the synthesis of multithreaded elas..:

Dimitrakopoulos, George N ; Seitanidis, I ; Psarras, A... , 2014
Link: http://hdl.handle.net/21..
 
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9

Hardware primitives for the synthesis of multithreaded elas..:

Dimitrakopoulos, George N ; Seitanidis, I ; Psarras, A...
Dimitrakopoulos, G. [et al.]. Hardware primitives for the synthesis of multithreaded elastic systems. A: Design, Automation and Test in Europe. "Design, Automation and Test in Europe: proceedings: Dresden, Germany: March 24-28, 2014". Dreden: European Interactive Digital Advertising Alliance (EDAA), 2014, p. 1-4..  , 2014
Link: http://hdl.handle.net/21..
 
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10

Hardware primitives for the synthesis of multithreaded elas..:

, In: 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE),
Dimitrakopoulos, G. ; Seitanidis, I. ; Psarras, A.... - p. 1-4 , 2014
Link: https://doi.org/10.7873/..
 
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11

Hardware primitives for the synthesis of multithreaded elas..:

, In: Proceedings of the conference on Design, Automation & Test in Europe,
Dimitrakopoulos, G. ; Seitanidis, I. ; Psarras, A.... - p. 1-4 , 2014
Link: https://dl.acm.org/doi/1..
 
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12

Soft-Clustering Driven Flip-flop Placement Targeting Clock-..:

, In: Proceedings of the 2020 International Symposium on Physical Design,
Mangiras, Dimitrios ; Mattheakis, Pavlos ; Ribet, Pierre-Olivier. - p. 25-32 , 2020
Link: https://dl.acm.org/doi/1..
 
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13

Timing Driven Incremental Multi-Bit Register Composition Us..:

, In: Proceedings of the 54th Annual Design Automation Conference 2017,
Seitanidis, Ioannis ; Dimitrakopoulos, Giorgos ; Mattheakis, Pavlos.. - p. 1-6 , 2017
Link: https://dl.acm.org/doi/1..
 
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14

A Low-Power Network-on-Chip Architecture for Tile-based Chi..:

, In: Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
Psarras, Anastasios ; Lee, Junghee ; Mattheakis, Pavlos.. - p. 335-340 , 2016
Link: https://dl.acm.org/doi/1..
 
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15

Robust prediction of complex spatiotemporal states through ..:

Barmparis, G.D. ; Neofotistos, G. ; Mattheakis, M....
Physics Letters A.  384 (2020)  15 - p. 126300 , 2020
Link: https://doi.org/10.1016/..
 
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