E-LIB Suche - Ergebnisse für: Ming-Dou Ker

1

2xVDD-tolerant crystal oscillator circuit realized with 1xV..:

, In: 2008 IEEE International Symposium on Circuits and Systems (ISCAS),

Ming-Dou Ker ; Tzu-Ming Wang ; Hung-Tai Liao - p. None , 2008

Link: https://doi.org/10.1109/..

2

ESD protection design for fully integrated CMOS RF power am..:

, In: 2008 IEEE International Symposium on Circuits and Systems (ISCAS),

Ming-Dou Ker ; Chun-Yu Lin ; Guo-Xuan Meng - p. None , 2008

Link: https://doi.org/10.1109/..

3

Capacitor-couple ESD protection circuit for deep-submicron ..:

Ming-Dou Ker ; Chung-Yu Wu ; Tao Cheng.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 4 (1996) 3 - p. 307-321 , 1996

Link: https://doi.org/10.1109/..

4

A new on-chip ESD protection circuit with dual parasitic SC..:

Chung-Yu Wu ; Ming-Dou Ker ; Chung-Yuan Lee.
IEEE Journal of Solid-State Circuits. 27 (1992) 3 - p. 274-280 , 1992

Link: https://doi.org/10.1109/..

5

A microvalve cell printing technique using riboflavin photo..:

Lin, Yu Wei ; Tsou, Kun Lin ; Fay, Cormac D....
Bioprinting. 20 (2020) - p. e00097 , 2020

Link: https://doi.org/10.1016/..

6

Test Structures of Cross-Domain Interface Circuits with Dee..:

, In: 2024 IEEE 36th International Conference on Microelectronic Test Structures (ICMTS),

Huang, Huai-Min ; Ker, Ming-Dou - p. 1-6 , 2024

Link: https://doi.org/10.1109/..

7

Latchup Risk in a 4H-SiC Process:

Ke, Chao-Yang ; Ker, Ming-Dou
IEEE Transactions on Electron Devices. 71 (2024) 5 - p. 3424-3428 , 2024

Link: https://doi.org/10.1109/..

8

Investigation of Latch-Up Immunity in 0.18-f.1M BCD Process..:

, In: 2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA),

Ho, Wen-Yung ; Ker, Ming-Dou ; Wang, Chun-Chi.. - p. 1-2 , 2024

Link: https://doi.org/10.1109/..

9

A Versatile 8-Channel High Voltage Stimulator for Comprehen..:

, In: 2024 IEEE International Symposium on Circuits and Systems (ISCAS),

Lin, Kuan-Ting ; Ker, Ming-Dou - p. 1-5 , 2024

Link: https://doi.org/10.1109/..

10

Cost-Efficient Solution to Overcome Latch-Up Path in 5 V-To..:

Hsu, Chen-Wei ; Ker, Ming-Dou
IEEE Transactions on Electron Devices. 71 (2024) 3 - p. 2224-2227 , 2024

Link: https://doi.org/10.1109/..

11

Test Structures to Investigate ESD Robustness of Integrated..:

, In: 2024 IEEE 36th International Conference on Microelectronic Test Structures (ICMTS),

Wang, Wei-Cheng ; Ker, Ming-Dou - p. 1-4 , 2024

Link: https://doi.org/10.1109/..

12

Investigation of safe operating area and behavior of unclam..:

Ke, Chao-Yang ; Ker, Ming-Dou
Microelectronics Reliability. 155 (2024) - p. 115347 , 2024

Link: https://doi.org/10.1016/..

13

Design of CMOS Analog Front-End Local-Field Potential Chopp..:

Wu, Chung-Yu ; Huang, Chi-Wei ; Chen, Yu-Wei...
IEEE Transactions on Biomedical Circuits and Systems. 18 (2024) 3 - p. 539-551 , 2024

Link: https://doi.org/10.1109/..

14

Latch-up Risk in 5V-tolerant I/O Buffer Surrounded by NBL I..:

, In: 2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA),

Hsu, Chen-Wei ; Ker, Ming-Dou - p. 1-2 , 2024

Link: https://doi.org/10.1109/..

15

Embedded Deep-Nwell Collector Used to Improve Latch-Up Immu..:

, In: 2024 IEEE International Reliability Physics Symposium (IRPS),

Hsu, Chen-Wei ; Ker, Ming-Dou ; Chung, Ping-Lin.. - p. 1-4 , 2024

Link: https://doi.org/10.1109/..