E-LIB Suche - Ergebnisse für: Orailoglu, A.

1

Scheduling Power-Constrained Tests through the SoC Function..:

HUSSIN, F. A. ; YONEDA, T. ; ORAILOGLU, A..
IEICE Transactions on Information and Systems. E91-D (2008) 3 - p. 736-746 , 2008

Link: https://doi.org/10.1093/..

2

Architectures for silicon nanoelectronics and beyond:

Bahar, R.I. ; Lau, C. ; Hammerstrom, D....
Computer. 40 (2007) 1 - p. 25-33 , 2007

Link: https://doi.org/10.1109/..

3

A DFT approach for diagnosis and process variation-aware st..:

, In: Proceedings. 42nd Design Automation Conference, 2005.,

Topaloglu, R.O. ; Orailoglu, A. - p. 851,852,853,854,855,856 , 2005

Link: https://doi.org/10.1145/..

4

Frugal linear network-based test decompression for drastic ..:

, In: Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design,

Rao, Wenjing ; Orailoglu, A. ; Su, G. - p. 721-725 , 2004

Link: https://dl.acm.org/doi/1..

5

Design space exploration for aggressive test cost reduction..:

, In: Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design,

Arslan, B. ; Orailoglu, A. - p. 726-731 , 2004

Link: https://dl.acm.org/doi/1..

6

Seamless test of digital components in mixed-signal paths:

Ozev, S. ; Bayraktaroglu, I. ; Orailoglu, A.
IEEE Design & Test of Computers. 21 (2004) 1 - p. 44-55 , 2004

Link: https://doi.org/10.1109/..

7

Transforming binary code for low-power embedded processors:

Petrov, P. ; Orailoglu, A.
IEEE Micro. 24 (2004) 3 - p. 21-33 , 2004

Link: https://doi.org/10.1109/..

8

Low-power instruction bus encoding for embedded processors:

Petrov, P. ; Orailoglu, A.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 12 (2004) 8 - p. 812-826 , 2004

Link: https://doi.org/10.1109/..

9

Design of concurrent test Hardware for Linear analog circui..:

Ozev, S. ; Orailoglu, A.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 12 (2004) 7 - p. 756-765 , 2004

Link: https://doi.org/10.1109/..

10

Compacting test responses for deeply embedded SoC cores:

Sinanoglu, O. ; Orailoglu, A.
IEEE Design & Test of Computers. 20 (2003) 4 - p. 22-30 , 2003

Link: https://doi.org/10.1109/..

11

Application-specific instruction memory customizations for ..:

Petrov, P. ; Orailoglu, A.
IEEE Design & Test of Computers. 20 (2003) 1 - p. 18-25 , 2003

Link: https://doi.org/10.1109/..

12

Test application time and volume compression through seed o..:

, In: Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451),

Rao, W. ; Bayraktaroglu, I. ; Orailoglu, A. - p. 732,733,734,735,736,737 , 2003

Link: https://doi.org/10.1145/..

13

Customizable embedded processor architectures:

, In: Euromicro Symposium on Digital System Design, 2003. Proceedings.,

Petrov, P. ; Orailoglu, A. - p. 468,469,470,471,472,473,474,475 , 2003

Link: https://doi.org/10.1109/..

14

Guest editors' introduction: application-specific microproc..:

Orailoglu, A. ; Veidenbaum, A.
IEEE Design & Test of Computers. 20 (2003) 1 - p. 6-7 , 2003

Link: https://doi.org/10.1109/..

15

Multilevel testability analysis and solutions for integrate..:

Ozev, S. ; Orailoglu, A. ; Olgaard, C.V.
IEEE Design & Test of Computers. 19 (2002) 5 - p. 82-91 , 2002

Link: https://doi.org/10.1109/..