Przigoda, Judith
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1

Optimal Railway Routing Using Virtual Subsections:

, In: Reliability, Safety, and Security of Railway Systems. Modelling, Analysis, Verification, and Certification; Lecture Notes in Computer Science,
Peham, Tom ; Przigoda, Judith ; Przigoda, Nils. - p. 63-79 , 2022
 
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More than true or false : native support of irregular va..:

, In: Proceedings of the 15th ACM-IEEE International Conference on Formal Methods and Models for System Design,
 
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Integrating an SMT-based ModelFinder into USE:

, In: Model-driven engineering, verification and validation / edited by Michalis Famelis, Daniel Ratiu, Gehan M.K. Selim
 
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Clocks vs. instants relations 

, In: 2016 ACM/IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE) / general chair: Jean-Pierre Talpin (INRIA, France)
verifying CCSL time constraints in UML/MARTE models 
Peters, Judith ; Przigoda, Nils ; Wille, Robert.. (2016)  - p. 78-84
 
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Clocks vs. instants relations : verifying CCSL time cons..:

, In: Proceedings of the 14th ACM-IEEE International Conference on Formal Methods and Models for System Design,
 
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A generic representation of CCSL time constraints for UML/M..:

, In: Proceedings of the 52nd Annual Design Automation Conference,
 
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More than true or false 

, In: Proceedings of the 15th ACM/IEEE International Conference on Formal Methods and Models for System Design / general chair: Jean-Pierre Talpin (INRIA, France)
native support of irregular values in the automatic validat... 
 
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