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Ritzenthaler, Romain
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1

Special size effects in advanced single-gate and multiple-g..:

Ohata, Akiko ; Ritzenthaler, Romain ; Faynot, Olivier.
Journal of Telecommunications and Information Technology.  , 2023
Link: https://doi.org/10.26636..
 
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2

Impact of Nitridation on Bias Temperature Instability and H..:

Tyaginov, Stanislav ; O'Sullivan, Barry ; Chasin, Adrian...
Micromachines.  14 (2023)  8 - p. 1514 , 2023
Link: https://doi.org/10.3390/..
 
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3

The Low-Frequency Noise Behavior of Advanced Logic and Memo..:

, In: 2022 China Semiconductor Technology International Conference (CSTIC),
Simoen, Eddy ; Ritzenthaler, Romain ; Mertens, Hans... - p. 1-4 , 2022
Link: https://doi.org/10.1109/..
 
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4

80 nm tall thermally stable cost effective FinFETs for adva..:

Spessot, Alessio ; Ritzenthaler, Romain ; Litta, Eugenio Dentoni...
Japanese Journal of Applied Physics.  60 (2021)  SB - p. SBBB06 , 2021
Link: https://doi.org/10.35848..
 
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5

Low frequency noise performance of horizontal, stacked and ..:

Simoen, Eddy ; de Oliveira, Alberto Vinicius ; Agopian, Paula Ghedini Der...
Solid-State Electronics.  184 (2021)  - p. 108087 , 2021
Link: https://doi.org/10.1016/..
 
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6

Comparison of Temperature Dependent Carrier Transport in Fi..:

Kim, Soohyun ; Kim, Jungchun ; Jang, Doyoung...
Applied Sciences.  10 (2020)  8 - p. 2979 , 2020
Link: https://doi.org/10.3390/..
 
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7

Relevance of fin dimensions and high-pressure anneals on ho..:

, In: 2020 IEEE International Reliability Physics Symposium (IRPS),
Chasin, Adrian ; Franco, Jacopo ; Bury, Erik... - p. 1-6 , 2020
Link: https://doi.org/10.1109/..
 
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8

Impact of Device Architecture and Gate Stack Processing on ..:

, In: 2019 IEEE 13th International Conference on ASIC (ASICON),
Simoen, Eddy ; Oliveira, Alberto Vinicius ; Veloso, Anabela... - p. 1-4 , 2019
Link: https://doi.org/10.1109/..
 
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9

Junction technology challenges and solutions for 3D device ..:

, In: 2019 19th International Workshop on Junction Technology (IWJT),
Kikuchi, Yoshiaki ; Mertens, Hans ; Ritzenthaler, Romain... - p. 1-5 , 2019
Link: https://doi.org/10.23919..
 
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10

Reliability in Stacked Gate-All-Around Si Nanowire Devices:..:

, In: 2019 IEEE International Integrated Reliability Workshop (IIRW),
Chasin, Adrian ; Horiguchi, Naoto ; Linten, Dimitri... - p. 1-8 , 2019
Link: https://doi.org/10.1109/..
 
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11

CMOS integration of high-k/metal gate transistors in diffus..:

Litta, Eugenio Dentoni ; Ritzenthaler, Romain ; Schram, Tom...
Japanese Journal of Applied Physics.  57 (2018)  4S - p. 04FB08 , 2018
Link: https://doi.org/10.7567/..
 
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12

(Invited) Gate-All-Around Transistors Based on Vertically S..:

Mertens, Hans ; Ritzenthaler, Romain ; Hikavyy, Andriy Yakovitch...
ECS Transactions.  77 (2017)  5 - p. 19-30 , 2017
Link: https://doi.org/10.1149/..
 
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13

Hot-carrier analysis on nMOS Si FinFETs with solid source d..:

, In: 2016 IEEE International Reliability Physics Symposium (IRPS),
Chasin, Adrian ; Franco, Jacopo ; Ritzenthaler, Romain... - p. 4B-4-1-4B-4-6 , 2016
Link: https://doi.org/10.1109/..
 
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14

Optimized material solutions for advanced DRAM peripheral t..:

Spessot, Alessio ; Ritzenthaler, Romain ; Schram, Tom..
physica status solidi (a).  213 (2016)  2 - p. 245-254 , 2016
Link: https://doi.org/10.1002/..
 
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15

Optimized material solutions for advanced DRAM peripheral t..:

Spessot, Alessio ; Ritzenthaler, Romain ; Schram, Tom..
physica status solidi (a).  213 (2016)  2 - p. 484-484 , 2016
Link: https://doi.org/10.1002/..
 
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