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Royannez, P.
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Re-Using Clock Management Unit to implement Power Gating an..:

, In: 2007 IEEE International Conference on Integrated Circuit Design and Technology,
Royannez, P. ; Jumel, F. ; Mair, H.... - p. None , 2007
Link: https://doi.org/10.1109/..
 
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A Leakage Management System Based on Clock Gating Infrastru..:

, In: 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers.,
Ko, U. ; Raibaut, C. ; Ciroux, J.... - p. 214-215 , 2006
Link: https://doi.org/10.1109/..
 
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3

A design platform for 90-nm leakage reduction techniques:

, In: Proceedings. 42nd Design Automation Conference, 2005.,
Royannez, P. ; Mair, H. ; Dahan, F.... - p. 549,550 , 2005
Link: https://doi.org/10.1145/..
 
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