Rozeau, Olivier
32  results:
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1

Body resistance model for Partially Depleted SOI device: ch..:

, In: 2023 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD),
 
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3

FDSOI MOSFET Subthreshold Slope Model Accuracy Improvement ..:

, In: 2023 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD),
 
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4

L-UTSOI: Best in-class compact modeling solution for FD-SOI..:

, In: 2021 5th IEEE Electron Devices Technology & Manufacturing Conference (EDTM),
 
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5

L-UTSOI: A compact model for low-power analog and digital a..:

, In: 2020 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD),
 
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6

MOS-like approach for compact modeling of High-Electron-Mob..:

, In: 2020 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD),
 
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7

From devices to circuits: modelling the performance of 5nm ..:

, In: 2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD),
 
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8

Single Event Transient Compact Model for FDSOI MOSFETs Taki..:

, In: 2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD),
 
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10

From 2D to Monolithic 3D : Design Possibilities, Expecta..:

, In: Proceedings of the 2015 Symposium on International Symposium on Physical Design,
Billoint, Olivier ; Sarhan, Hossam ; Rayane, Iyad... - p. 127 ff. , 2015
 
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11

3D FPGA using high-density interconnect monolithic integrat..:

, In: Proceedings of the conference on Design, Automation & Test in Europe,
 
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13

3D FPGA using high-density interconnect Monolithic Integrat..:

, In: 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE),
 
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