Schuddinck, Pieter
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1

DTCO of Nanosheet and Forksheet Architectures: Exploring Di..:

, In: 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM),
 
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2

Multi-VT Options at Scaled Vertical Pitch in Gate-All-Aroun..:

, In: 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM),
 
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4

CFET SRAM With Double-Sided Interconnect Design and DTCO Be..:

Liu, Hsiao-Hsuan ; Schuddinck, Pieter ; Pei, Zhenlin...
IEEE Transactions on Electron Devices.  70 (2023)  10 - p. 5099-5106 , 2023
 
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6

Evaluation of BEOL scaling boosters for sub-2nm using enhan..:

, In: 2022 IEEE International Interconnect Technology Conference (IITC),
Farokhnejad, Anita ; Esposto, Simone ; Ciofi, Ivan... - p. 136-138 , 2022
 
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7

Backside PDN and 2.5D MIMCAP to Double Boost 2D and 3D ICs ..:

Chen, Rongmei ; Sisto, Giuliano ; Stucchi, Michele...
uri/info:doi/10.1109/VLSITechnologyandCir46769.2022.9830328.  , 2022
 
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