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Sekhar, Vasarla Nagendra
14  results:
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1

Dielectric Stack Optimization for Die-level Warpage Reducti..:

, In: 2024 IEEE 74th Electronic Components and Technology Conference (ECTC),
Rao, B.S.S. Chandra ; Kumar, Mishra Dileep ; Sekhar, Vasarla Nagendra... - p. 62-68 , 2024
Link: https://doi.org/10.1109/..
 
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2

Multi-Chip Stacked Memory Module Development using Chip to ..:

, In: 2024 IEEE 74th Electronic Components and Technology Conference (ECTC),
Sekhar, Vasarla Nagendra ; Kumar, Mishra Dileep ; Tippabhotla, Sasi Kumar... - p. 2024-2030 , 2024
Link: https://doi.org/10.1109/..
 
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3

Polymer Dielectric Materials Evaluation for Hybrid Bonding ..:

, In: 2023 IEEE 25th Electronics Packaging Technology Conference (EPTC),
Sekhar, Vasarla Nagendra ; Fujiwara, Takenori ; Araki, Hitoshi... - p. 216-220 , 2023
Link: https://doi.org/10.1109/..
 
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4

Development of 4 die stack module using Hybrid bonding appr..:

, In: 2023 IEEE 73rd Electronic Components and Technology Conference (ECTC),
Chong, Ser Choong ; Keng Yuen, Jason Au ; Sekhar, Vasarla Nagendra.. - p. 788-794 , 2023
Link: https://doi.org/10.1109/..
 
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5

Reliability Assessment of 2.5D Module using Chip to Wafer H..:

, In: 2023 IEEE 25th Electronics Packaging Technology Conference (EPTC),
Chong, Ser Choong ; Au Keng Yuen, Jason ; Sekhar, Vasarla Nagendra... - p. 425-429 , 2023
Link: https://doi.org/10.1109/..
 
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6

Cu Damascene Process on Temporary Bonded Wafers for Thin Ch..:

, In: 2023 IEEE 73rd Electronic Components and Technology Conference (ECTC),
Sekhar, Vasarla Nagendra ; Kumar, Mishra Dileep ; Lianto, Prayudi.. - p. 564-570 , 2023
Link: https://doi.org/10.1109/..
 
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7

Chip-to-Wafer Hybrid Bonding for high performance 2.5D appl..:

, In: 2022 IEEE 24th Electronics Packaging Technology Conference (EPTC),
Chong, Ser Choong ; Daniel, Ismael Cereno ; Sekhar, Vasarla Nagendra.. - p. 19-23 , 2022
Link: https://doi.org/10.1109/..
 
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8

Heterogeneous System Level Integration Using Active Si Inte..:

Chidambaram, Vivek ; Lim Pei Siang, Sharon ; Xiangyu, Wang..
IEEE Journal of the Electron Devices Society.  7 (2019)  - p. 1209-1216 , 2019
Link: https://doi.org/10.1109/..
 
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9

Design, assembly and reliability of large die and fine-pitc..:

Ong, Yue Ying ; Ho, Soon Wee ; Vaidyanathan, Kripesh...
Microelectronics Reliability.  50 (2010)  7 - p. 986-994 , 2010
Link: https://doi.org/10.1016/..
 
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10

Process Challenges in Thin Wafers Fabrication with Double S..:

, In: 2024 IEEE 74th Electronic Components and Technology Conference (ECTC),
Kumar, Mishra Dileep ; Nagendra Sekhar, Vasarla ; Rao, B.S.S. Chandra.. - p. 614-619 , 2024
Link: https://doi.org/10.1109/..
 
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11

Evaluation of Low Temperature Inorganic Dielectric Material..:

, In: 2023 IEEE 25th Electronics Packaging Technology Conference (EPTC),
Kumar, Mishra Dileep ; Nagendra Sekhar, Vasarla ; Choong, Chong Ser... - p. 354-358 , 2023
Link: https://doi.org/10.1109/..
 
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12

Mechanical Characterization of Black Diamond (Low-k) Struct..:

Sekhar, Vasarla Nagendra
ISBN:978-953-51-0802-3.  , 2012
Link: https://mts.intechopen.c..
 
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13

Heterogeneous System Level Integration Using Active Si Inte..:

Vivek Chidambaram ; Sharon Lim Pei Siang ; Wang Xiangyu..
https://ieeexplore.ieee.org/document/8830464/.  , 2019
Link: https://doi.org/10.1109/..
 
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14

Mechanical Characterization of Black Diamond (Low-k) Struct..:

Nagendra Sekhar, Vasarla
https://openresearchlibrary.org/viewer/bb87aa8e-4b87-491e-bbe1-921d2f88469d.  , 2012
Link: https://openresearchlibr..
 
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