I agree that this site is using cookies. You can find further informations here.
X
Seongil, O.
20  results:
Search for persons X
?
1

Hardware Architecture and Software Stack for PIM Based on C..:

, In: 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA),
Lee, Sukhan ; Kang, Shin-haeng ; Lee, Jaehoon... - p. 43-56 , 2021
Link: https://doi.org/10.1109/..
 
?
2

Defect Analysis and Cost-Effective Resilience Architecture ..:

, In: 2017 IEEE International Symposium on High Performance Computer Architecture (HPCA),
Cha, Sanguhn ; Seongil, O. ; Shin, Hyunsung... - p. 61-72 , 2017
Link: https://doi.org/10.1109/..
 
?
3

Architecting to achieve a billion requests per second throu..:

Li, Sheng ; Lim, Hyeontaek ; Lee, Victor W....
ACM SIGARCH Computer Architecture News.  43 (2015)  3S - p. 476-488 , 2015
Link: https://doi.org/10.1145/..
 
?
4

Architecting to achieve a billion requests per second throu..:

, In: Proceedings of the 42nd Annual International Symposium on Computer Architecture,
Li, Sheng ; Lim, Hyeontaek ; Lee, Victor W.... - p. 476-488 , 2015
Link: https://dl.acm.org/doi/1..
 
?
5

Row-buffer decoupling: A case for low-latency DRAM microarc..:

, In: 2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA),
Seongil, O. ; Son, Young Hoon ; Kim, Nam Sung. - p. 337-348 , 2014
Link: https://doi.org/10.1109/..
 
?
6

Microbank : architecting through-silicon interposer-base..:

, In: Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis,
Son, Young Hoon ; Seongil, O. ; Yang, Hyunggyun... - p. 1059-1070 , 2014
Link: https://dl.acm.org/doi/1..
 
?
7

Reducing memory access latency with asymmetric DRAM bank or..:

, In: Proceedings of the 40th Annual International Symposium on Computer Architecture,
Son, Young Hoon ; Seongil, O. ; Ro, Yuhwan.. - p. 380-391 , 2013
Link: https://dl.acm.org/doi/1..
 
?
8

Reducing memory access latency with asymmetric DRAM bank or..:

Son, Young Hoon ; Seongil, O. ; Ro, Yuhwan..
ACM SIGARCH Computer Architecture News.  41 (2013)  3 - p. 380-391 , 2013
Link: https://doi.org/10.1145/..
 
?
9

A 16Gb 9.5Gb/S/pin LPDDR5X SDRAM With Low-Power Schemes Exp..:

, In: 2022 IEEE International Solid-State Circuits Conference (ISSCC),
Kim, Dae-Hyun ; Song, Byungkyu ; Ahn, Hyun-a... - p. 448-450 , 2022
Link: https://doi.org/10.1109/..
 
?
10

Hardware architecture and software stack for PIM based on c..:

, In: Proceedings of the 48th Annual International Symposium on Computer Architecture,
Lee, Sukhan ; Kang, Shin-haeng ; Lee, Jaehoon... - p. 43-56 , 2021
Link: https://dl.acm.org/doi/1..
 
?
11

3D-Xpath : high-density managed DRAM architecture with c..:

, In: Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques,
Lee, Sukhan ; Lee, Kiwon ; Sung, Minchul... - p. 1-12 , 2018
Link: https://dl.acm.org/doi/1..
 
?
12

Full-Stack Architecting to Achieve a Billion-Requests-Per-S..:

Li, Sheng ; Lim, Hyeontaek ; Lee, Victor W....
ACM Transactions on Computer Systems (TOCS).  34 (2016)  2 - p. 1-30 , 2016
Link: https://dl.acm.org/doi/1..
 
?
13

Achieving One Billion Key-Value Requests per Second on a Si..:

Li, Sheng ; Lim, Hyeontaek ; Lee, Victor W....
IEEE Micro.  36 (2016)  3 - p. 94-104 , 2016
Link: https://doi.org/10.1109/..
 
?
14

Full-Stack Architecting to Achieve a Billion-Requests-Per-S..:

Li, Sheng ; Lim, Hyeontaek ; Lee, Victor W....
ACM Transactions on Computer Systems.  34 (2016)  2 - p. 1-30 , 2016
Link: https://doi.org/10.1145/..
 
?
15

CIDR: A Cache Inspired Area-Efficient DRAM Resilience Archi..:

O, Seongil ; Kwon, Sanghyuk ; Son, Young Hoon..
IEEE Computer Architecture Letters.  14 (2015)  1 - p. 17-20 , 2015
Link: https://doi.org/10.1109/..
 
1-15