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1

A 32b single-chip microprocessor:

, In: 1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers,

Shauchi Ong ; Hu Chao ; Mon-Yen Tsai... - p. 28,29 , 1986

Link: https://doi.org/10.1109/..

2

Improving cache performance with Full-Map Block Directory:

Peir, Jih-Kwon ; Hsu, Windsor W. ; Young, Honesty.
Journal of Systems Architecture. 46 (2000) 5 - p. 439-454 , 2000

Link: https://doi.org/10.1016/..

3

Improving cache performance with balanced tag and data path:

, In: Proceedings of the seventh international conference on Architectural support for programming languages and operating systems,

Peir, Jih-Kwon ; Hsu, Windsor W. ; Young, Honesty. - p. 268-278 , 1996

Link: https://dl.acm.org/doi/1..

4

Improving cache performance with balanced tag and data path:

Peir, Jih-Kwon ; Hsu, Windsor W. ; Young, Honesty.
ACM SIGPLAN Notices. 31 (1996) 9 - p. 268-278 , 1996

Link: https://doi.org/10.1145/..

5

Improving cache performance with balanced tag and data path:

Peir, Jih-Kwon ; Hsu, Windsor W. ; Young, Honesty.
ACM SIGOPS Operating Systems Review. 30 (1996) 5 - p. 268-278 , 1996

Link: https://doi.org/10.1145/..

6

Improving cache performance with Full-Map Block Directory:

CISE Department, University of Florida, Gainesville, FL 32611, USA ( host institution ) ; Peir, Jih-Kwon ; Hsu, Windsor W..
Journal of Systems Architecture. , 2000

Link: http://ufdc.ufl.edu/LS00..

7

Improving cache performance with Full-Map Block Directory:

CISE Department, University of Florida, Gainesville, FL 32611, USA ( host institution ) ; Peir, Jih-Kwon ( author ) ; Hsu, Windsor W. ( author )..
Journal of Systems Architecture. , 2000

Link: https://doi.org/10.1016/..

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