Sizhen Li
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1

Optimal clock overlapping of four-phase Dickson charge pump..:

, In: 2008 9th International Conference on Solid-State and Integrated-Circuit Technology,
Kai Yu ; Xuecheng Zou ; Guoyi Yu. - p. None , 2008
 
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2

A precise bandgap reference with intrinsic compensation for..:

, In: APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems,
Sizhen Li ; Xuecheng Zou ; Xiaofei Chen... - p. None , 2008
 
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3

A 90nm CMOS wide-band voltage-controlled ring oscillator fo..:

, In: APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems,
Kai Yu ; Xuecheng Zou ; Jianming Lei... - p. None , 2008
 
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4

A 521pW, 0.016%/V Line Sensitivity Self-Biased CMOS Voltage..:

Yu, Kai ; Yang, Shangru ; Li, Sizhen.
IEEE Transactions on Circuits and Systems II: Express Briefs.  71 (2024)  4 - p. 1754-1758 , 2024
 
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5

Design of 300nA quiescent current and 300mA load capacity L..:

Yu, Kai ; Gao, Junfeng ; Zhang, Jingran.
IEICE Electronics Express.  21 (2024)  12 - p. 20240100-20240100 , 2024
 
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6

A 353pW, 0.014%/V line sensitivity self-biased CMOS voltage..:

Yu, Kai ; Zhang, Jingran ; Li, Sizhen
IEICE Electronics Express.  21 (2024)  2 - p. 20230497-20230497 , 2024
 
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7

A 0.011%/V LS and −76-dB PSRR Self-Biased CMOS Voltage Refe..:

Yu, Kai ; Chen, Jiyang ; Li, Sizhen.
IEEE Transactions on Circuits and Systems II: Express Briefs.  71 (2024)  3 - p. 1052-1056 , 2024
 
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8

A 146pW, 0.4V, 0.015%/V Line Sensitivity, High PSRR Leakage..:

, In: 2024 4th International Conference on Consumer Electronics and Computer Engineering (ICCECE),
Yu, Kai ; Hu, Qunshan ; Li, Sizhen - p. 430-434 , 2024
 
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