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Solay, Leo Raj
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1

Design and sensitivity analysis of GAA nanowire dopingless ..:

Solay, Leo Raj ; Kumar, Naveen ; Singh, Sarabdeep...
Physica Scripta.  99 (2024)  6 - p. 065040 , 2024
Link: https://doi.org/10.1088/..
 
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2

Implementation of Gate-All-Around Gate-Engineered Charge Pl..:

Singh, Sarabdeep ; Solay, Leo Raj ; Anand, Sunny...
Micromachines.  14 (2023)  7 - p. 1357 , 2023
Link: https://doi.org/10.3390/..
 
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3

Design of Negative Capacitance based Dopantfree Junctionles..:

, In: 2023 8th International Conference on Communication and Electronics Systems (ICCES),
Latief, Esha ; Kumar, Pradeep ; Anand, Sunny. - p. 117-122 , 2023
Link: https://doi.org/10.1109/..
 
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4

Design and Implementation of CS Amplifier using Si0.5Ge0.5 ..:

, In: 2023 World Conference on Communication & Computing (WCONF),
Thalapalli, Venkatasai ; Konathala, Thaneesh Nag ; Solay, Leo Raj. - p. 1-6 , 2023
Link: https://doi.org/10.1109/..
 
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5

Design and Analysis of 6T SRAM Implementation upon Dual Gat..:

, In: 2023 3rd International Conference on Intelligent Technologies (CONIT),
Adlakha, Akshaya ; Hussain, Waqar ; Solay, Leo Raj... - p. 1-6 , 2023
Link: https://doi.org/10.1109/..
 
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6

Design and Investigation of SRAM using Charge Plasma Doping..:

, In: 2023 World Conference on Communication & Computing (WCONF),
Goel, Prateek ; Agrawal, Madan Gopal ; Anand, Sunny.. - p. 1-8 , 2023
Link: https://doi.org/10.1109/..
 
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7

Doping-less TFET Based Common Source Amplifier Implementati..:

Bhardwaj, Anjana ; Solay, Leo Raj ; Kumar, Naveen...
Silicon.  14 (2022)  18 - p. 12251-12260 , 2022
Link: https://doi.org/10.1007/..
 
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8

Design and Implementation of Negative Capacitance Based Ele..:

Lone, Mohd Ashraf ; Solay, Leo Raj ; Singh, Amandeep..
Silicon.  14 (2022)  18 - p. 12293-12301 , 2022
Link: https://doi.org/10.1007/..
 
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9

Design and performance analysis of gate-all-around negative..:

Solay, Leo Raj ; Kumar, Naveen ; Amin, S Intekhab..
Semiconductor Science and Technology.  37 (2022)  11 - p. 115001 , 2022
Link: https://doi.org/10.1088/..
 
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10

Investigation of Common Source Amplifier Circuit using Gate..:

Solay, Leo Raj ; Kumar, Pradeep ; Amin, S. Intekhab.
ECS Journal of Solid State Science and Technology.  11 (2022)  8 - p. 083012 , 2022
Link: https://doi.org/10.1149/..
 
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11

Enhancing the design and performance of a gate-all-around (..:

Solay, Leo Raj ; Amin, S. Intekhab ; Kumar, Pradeep.
Journal of Computational Electronics.  20 (2021)  6 - p. 2350-2359 , 2021
Link: https://doi.org/10.1007/..
 
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12

Design of Dual-Gate P-type IMOS Based Industrial Purpose Pr..:

Solay, Leo Raj ; Singh, Sarabdeep ; Kumar, Naveen..
Silicon.  13 (2020)  12 - p. 4633-4640 , 2020
Link: https://doi.org/10.1007/..
 
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13

Design and Analysis of Gate Engineered Dual Material Gate D..:

Solay, Leo Raj ; Singh, Sarabdeep ; Amin, S. Intekhab.
Transactions on Electrical and Electronic Materials.  20 (2018)  2 - p. 132-140 , 2018
Link: https://doi.org/10.1007/..
 
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14

Implementation of Gate-All-Around Gate-Engineered Charge Pl..:

Singh, Sarabdeep ; Solay, Leo Raj ; Anand, Sunny...
http://www.ncbi.nlm.nih.gov/pmc/articles/PMC10384746/.  , 2023
Link: http://www.ncbi.nlm.nih...
 
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15

Implementation of gate-all-around gate-engineered charge pl..:

Singh, Sarabdeep ; Solay, Leo Raj ; Anand, Sunny...
https://eprints.gla.ac.uk/301849/1/301849.pdf.  , 2023
Link: https://eprints.gla.ac.u..
 
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