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Strangio, S.
52
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Online (52)
Mediatypes
Articles (Online) (29)
Bookchapter (Online) (1)
OpenAccess-fulltext (22)
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?
1
The case for hybrid analog neuromorphic chips based on sili..:
, In:
2023 International Electron Devices Meeting (IEDM)
,
Iannaccone, G.
;
Rizzo, T.
;
Paliy, M.
. - p. 1-4 , 2023
Link:
https://doi.org/10.1109/..
?
2
Digital and analog TFET circuits: Design and benchmark:
Strangio, S.
;
Settino, F.
;
Palestri, P.
...
Solid-State Electronics. 146 (2018) - p. 50-65 , 2018
Link:
https://doi.org/10.1016/..
?
3
Experimental examination of tunneling paths in SiGe/Si gate..:
Glass, S.
;
von den Driesch, N.
;
Strangio, S.
...
Applied Physics Letters. 111 (2017) 26 - p. , 2017
Link:
https://doi.org/10.1063/..
?
4
Benchmarks of a III-V TFET technology platform against the ..:
Strangio, S.
;
Palestri, P.
;
Lanuzza, M.
...
Solid-State Electronics. 128 (2017) - p. 37-42 , 2017
Link:
https://doi.org/10.1016/..
?
5
Experimental demonstration of strained Si nanowire GAA n-TF..:
Luong, G.V.
;
Strangio, S.
;
Tiedemannn, A.
...
Solid-State Electronics. 115 (2016) - p. 152-159 , 2016
Link:
https://doi.org/10.1016/..
?
6
On the bipolar resistive-switching characteristics of Al2O3..:
Goux, L.
;
Raghavan, N.
;
Fantini, A.
...
Journal of Applied Physics. 116 (2014) 13 - p. , 2014
Link:
https://doi.org/10.1063/..
?
7
Single-poly floating-gate memory cell options for analog ne..:
Paliy M
;
Rizzo T
;
Ruiu P
..
info:eu-repo/semantics/altIdentifier/wos/WOS:000701908200004. , 2021
Link:
http://hdl.handle.net/11..
?
8
Observation of single phonon-mediated quantum transport in ..:
Bigoni S
;
Tagliaferri M. L. V
;
Tamascelli D
...
info:eu-repo/semantics/altIdentifier/wos/WOS:000590708500001. , 2020
Link:
http://hdl.handle.net/11..
?
9
Strained Silicon Complementary TFET SRAM: Experimental Demo..:
Luong, Gia Vinh
;
Strangio, S
;
Tiedemann, Andreas
...
info:eu-repo/semantics/altIdentifier/hdl/2128/19674. , 2018
Link:
https://juser.fz-juelich..
?
10
Strained Silicon Complementary TFET SRAM: Experimental Demo..:
Luong G. V
;
Strangio S
;
Tiedemann A. T
...
info:eu-repo/semantics/altIdentifier/wos/WOS:000443963500012. , 2018
Link:
http://hdl.handle.net/11..
?
11
Digital and analog TFET circuits: Design and benchmark:
Strangio, S
;
Settino, F
;
Palestri, P
...
info:eu-repo/semantics/altIdentifier/wos/WOS:000434705500009. , 2018
Link:
http://hdl.handle.net/11..
?
12
Understanding the potential and limitations of tunnel FETs ..:
Settino F
;
Lanuzza M
;
Strangio S
...
info:eu-repo/semantics/altIdentifier/wos/WOS:000402057100041. , 2017
Link:
http://hdl.handle.net/11..
?
13
Experimental examination of tunneling paths in SiGe/Si gate..:
Glass, S
;
von den Driesch, N
;
Strangio, S
...
info:eu-repo/semantics/altIdentifier/wos/WOS:000418947200035. , 2017
Link:
http://hdl.handle.net/11..
?
14
Assessment of InAs/AlGaSb Tunnel-FET Virtual Technology Pla..:
Strangio S
;
Palestri P
;
Lanuzza M
...
info:eu-repo/semantics/altIdentifier/wos/WOS:000378607100017. , 2016
Link:
http://hdl.handle.net/11..
?
15
Low frequency noise and gate bias instability in normally o..:
Crupi F
;
Magnone P
;
Strangio S
..
info:eu-repo/semantics/altIdentifier/wos/WOS:000375004500064. , 2016
Link:
http://hdl.handle.net/11..
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