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Takashima, Daisaburo
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Session 2 overview: High-bandwidth DRAM & PRAM: Memory subc..:

, In: 2012 IEEE International Solid-State Circuits Conference,
Choi, Joo Sun ; Takashima, Daisaburo - p. 36-37 , 2012
Link: https://doi.org/10.1109/..
 
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A 64-Mb Chain FeRAM With Quad BL Architecture and 200 MB/s ..:

Hoya, Katsuhiko ; Takashima, Daisaburo ; Shiratake, Shinichiro...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  18 (2010)  12 - p. 1745-1752 , 2010
Link: https://doi.org/10.1109/..
 
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