Testa, Eleonora
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3

Three-Input Gates for Logic Synthesis:

Marakkalage, Dewmini Sudara ; Testa, Eleonora ; Riener, Heinz...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.  40 (2021)  10 - p. 2184-2188 , 2021
 
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4

Algebraic and Boolean Optimization Methods for AQFP Superco..:

, In: Proceedings of the 26th Asia and South Pacific Design Automation Conference,
Testa, Eleonora ; Lee, Siang-Yun ; Riener, Heinz. - p. 779-785 , 2021
 
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A logic synthesis toolbox for reducing the multiplicative c..:

, In: Proceedings of the 23rd Conference on Design, Automation and Test in Europe,
Testa, Eleonora ; Soeken, Mathias ; Riener, Heinz.. - p. 568-573 , 2020
 
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7

SAT-sweeping enhanced for logic synthesis:

, In: Proceedings of the 57th ACM/EDAC/IEEE Design Automation Conference,
 
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8

Multiplier Architectures: Challenges and Opportunities with..:

, In: 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE),
 
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9

SAT-Sweeping Enhanced for Logic Synthesis:

, In: 2020 57th ACM/IEEE Design Automation Conference (DAC),
 
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10

Multiplier architectures : challenges and opportunities ..:

, In: Proceedings of the 23rd Conference on Design, Automation and Test in Europe,
 
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11

A Logic Synthesis Toolbox for Reducing the Multiplicative C..:

, In: 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE),
Testa, Eleonora ; Soeken, Mathias ; Riener, Heinz.. - p. 568-573 , 2020
 
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12

A Hybrid Method for Spectral Translation Equivalent Boolean..:

, In: 2019 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM),
 
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13

Scalable Generic Logic Synthesis : One Approach to Rule ..:

, In: Proceedings of the 56th Annual Design Automation Conference 2019,
 
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15

Mapping Monotone Boolean Functions into Majority:

Testa, Eleonora ; Soeken, Mathias ; Amaru, Luca G...
IEEE Transactions on Computers.  68 (2019)  5 - p. 791-797 , 2019
 
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