Vavouliotis, Georgios
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1

Practically Tackling Memory Bottlenecks of Graph-Processing..:

, In: 2024 IEEE International Parallel and Distributed Processing Symposium (IPDPS),
 
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2

A Two Level Neural Approach Combining Off-Chip Prediction w..:

, In: 2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA),
 
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3

Concurrent GCs and Modern Java Workloads: A Cache Perspecti..:

, In: Proceedings of the 2023 ACM SIGPLAN International Symposium on Memory Management,
 
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4

Page Size Aware Cache Prefetching:

, In: 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO),
Vavouliotis, Georgios ; Chacon, Gino ; Alvarez, Lluc... - p. 956-974 , 2022
 
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5

Exploiting page table locality for agile TLB prefetching:

, In: Proceedings of the 48th Annual International Symposium on Computer Architecture,
 
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6

Exploiting Page Table Locality for Agile TLB Prefetching:

, In: 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA),
 
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7

Morrigan: A Composite Instruction TLB Prefetcher:

, In: MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture,
Vavouliotis, Georgios ; Alvarez, Lluc ; Grot, Boris.. - p. 1138-1153 , 2021
 
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11

Pushing the envelope on free TLB prefetching:

Vavouliotis, Georgios ; Álvarez Martí, Lluc ; Casas, Marc
Vavouliotis, G.; Álvarez Martí, L.; Casas, M. Pushing the envelope on free TLB prefetching. A: . Barcelona Supercomputing Center, 2021, p. 70-71..  , 2021
 
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