Veloso, A.
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1

CMOS Scaling by Nanosheet Device Architectures and Backside..:

, In: 2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA),
Horiguchi, N. ; Mertens, H. ; Ritzenthaler, R.... - p. 1-2 , 2024
 
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2

Cherenkov Light Emission in Pure Cherenkov Emitters for Pro..:

Rebolo, L. ; Trigila, C. ; Ellin, J....
IEEE Transactions on Radiation and Plasma Medical Sciences.  8 (2024)  1 - p. 15-20 , 2024
 
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3

3D Stacked Devices and MOL Innovations for Post-Nanosheet C..:

, In: 2023 International Electron Devices Meeting (IEDM),
Horiguchi, N. ; Mertens, H. ; Chiarella, T.... - p. 1-4 , 2023
 
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4

Impact of Backside Power Delivery Network with Buried Power..:

, In: 2023 45th Annual EOS/ESD Symposium (EOS/ESD),
Serbulova, K. ; Chen, S.-H. ; Hellings, G.... - p. 1-6 , 2023
 
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5

PPA and Scaling Potential of Backside Power Options in N2 a..:

, In: 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits),
Yang, S. ; Schuddinck, P. ; Garcia-Bardon, M.... - p. 1-2 , 2023
 
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6

Nanosheet-based Device Architectures with Front/Backside Co..:

, In: 2023 21st International Workshop on Junction Technology (IWJT),
Veloso, A. ; Eneman, G. ; Matagne, P.... - p. 1-5 , 2023
 
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8

Backside Power Delivery: Game Changer and Key Enabler of Ad..:

, In: 2023 International Electron Devices Meeting (IEDM),
Veloso, A. ; Vermeersch, B. ; Chen, R.... - p. 1-4 , 2023
 
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14

ESD Challenges in 300nm Si Substrate of DTCO/STCO Scaling O..:

, In: 2023 International Electron Devices Meeting (IEDM),
Chen, W.-C. ; Chen, S.-H. ; Veloso, A.... - p. 1-4 , 2023
 
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15

Block-level Evaluation and Optimization of Backside PDN for..:

, In: 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits),
Sisto, G. ; Preston, R. ; Chen, R.... - p. 1-2 , 2023
 
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