Wang, Laung-Terng (L.-T.)
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2

Digital Test Architectures:

, In: System-on-Chip Test Architectures,
Wang, Laung-Terng (L.-T.) - p. 41-121 , 2008
 
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3

Introduction:

, In: System-on-Chip Test Architectures,
 
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4

Low-Power Scan-Based Built-In Self-Test Based on Weighted P..:

Xiang, Dong ; Wen, Xiaoqing ; Wang, Laung-Terng
IEEE Transactions on Very Large Scale Integration (VLSI) Systems.  25 (2017)  3 - p. 942-953 , 2017
 
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6

On Achieving Capture Power Safety in At-Speed Scan-Based Lo..:

TOMITA, Akihiro ; WEN, Xiaoqing ; SATO, Yasuo...
IEICE Transactions on Information and Systems.  E97.D (2014)  10 - p. 2706-2718 , 2014
 
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7

Testing of Synchronizers in Asynchronous FIFO:

Kim, Hyoung-Kook ; Wang, Laung-Terng ; Wu, Yu-Liang.
Journal of Electronic Testing.  29 (2013)  1 - p. 49-72 , 2013
 
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8

Scan Flip-Flop Grouping to Compress Test Data and Compact T..:

Xiang, Dong ; Chen, Zhen ; Wang, Laung-Terng
ACM Transactions on Design Automation of Electronic Systems (TODAES).  17 (2012)  2 - p. 1-24 , 2012
 
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9

Launch-on-Shift Test Generation for Testing Scan Designs Co..:

Wu, Shianling ; Wang, Laung-Terng ; Wen, Xiaoqing...
ACM Transactions on Design Automation of Electronic Systems (TODAES).  17 (2012)  4 - p. 1-16 , 2012
 
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10

Launch-on-Shift Test Generation for Testing Scan Designs Co..:

Wu, Shianling ; Wang, Laung-Terng ; Wen, Xiaoqing...
ACM Transactions on Design Automation of Electronic Systems.  17 (2012)  4 - p. 1-16 , 2012
 
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11

Scan Flip-Flop Grouping to Compress Test Data and Compact T..:

Xiang, Dong ; Chen, Zhen ; Wang, Laung-Terng
ACM Transactions on Design Automation of Electronic Systems.  17 (2012)  2 - p. 1-24 , 2012
 
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13

High Launch Switching Activity Reduction in At-Speed Scan T..:

MIYASE, Kohei ; WEN, Xiaoqing ; FURUKAWA, Hiroshi...
IEICE Transactions on Information and Systems.  E93-D (2010)  1 - p. 2-9 , 2010
 
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14

Electronic design automation 

synthesis, verification, and test  The Morgan Kaufmann series in systems on silicon
Copies:  Zentrale:E02 a inf 110 m/626
 
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