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Wieferink, Andreas
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1

ASIP architecture exploration for efficient IPSec encryptio..:

Scharwaechter, Hanno ; Kammler, David ; Wieferink, Andreas...
ACM Transactions on Embedded Computing Systems.  6 (2007)  2 - p. 12 , 2007
Link: https://doi.org/10.1145/..
 
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2

ASIP architecture exploration for efficient IPSec encryptio..:

Scharwaechter, Hanno ; Kammler, David ; Wieferink, Andreas...
ACM Transactions on Embedded Computing Systems (TECS).  6 (2007)  2 - p. 12-es , 2007
Link: https://dl.acm.org/doi/1..
 
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3

Retargetable generation of TLM bus interfaces for MP-SoC pl..:

, In: Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis,
Wieferink, Andreas ; Leupers, Rainer ; Ascheid, Gerd... - p. 249-254 , 2005
Link: https://dl.acm.org/doi/1..
 
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4

A System Level Processor/Communication Co-Exploration Metho..:

, In: Proceedings of the conference on Design, automation and test in Europe - Volume 2,
Wieferink, Andreas ; Kogel, Tim ; Leupers, Rainer... - p. 21256 ff. , 2004
Link: https://dl.acm.org/doi/1..
 
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5

A modular simulation framework for architectural exploratio..:

, In: Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis,
Kogel, Tim ; Doerper, Malte ; Wieferink, Andreas... - p. 7-12 , 2003
Link: https://dl.acm.org/doi/1..
 
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6

Processor/Memory Co-Exploration on Multiple Abstraction Lev..:

, In: Proceedings of the conference on Design, Automation and Test in Europe - Volume 1,
Braun, Gunnar ; Wieferink, Andreas ; Schliebusch, Oliver... - p. 10966 ff. , 2003
Link: https://dl.acm.org/doi/1..
 
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7

Retargetable processor system integration into multi-proces..:

Wieferink, Andreas ; Meyr, Heinrich ; Leupers, Rainer , 2008
Copies:  Zentrale:E02 a inf 130 e/552
 
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