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Willson, Alan N.
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1

A Lower Bound for the Hardware Complexity of FIR Filters:

Mehrnia, Alireza ; Willson, Alan N.
IEEE Circuits and Systems Magazine.  18 (2018)  1 - p. 10-28 , 2018
Link: https://doi.org/10.1109/..
 
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2

A 1.2 Gb/s recursive polyphase cascaded integrator-comb pre..:

, In: 2010 IEEE International Symposium on Circuits and Systems (ISCAS),
Liu, Xiong ; Willson, Alan N. - p. 2115-2118 , 2010
Link: https://doi.org/10.1109/..
 
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3

The design of asymmetrical square-root pulse-shaping filter..:

, In: 2008 IEEE International Symposium on Circuits and Systems (ISCAS),
Chia-Yu Yao ; Willson, Alan N. - p. None , 2008
Link: https://doi.org/10.1109/..
 
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4

Enhanced delta-based layered decoding of WiMAX QC-LDPC code:

, In: 2008 IEEE International Symposium on Circuits and Systems (ISCAS),
Tzu-Chieh Kuo ; Willson, Alan N. - p. None , 2008
Link: https://doi.org/10.1109/..
 
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5

A high-speed and high-accuracy interpolator for digital mod..:

, In: 2008 15th IEEE International Conference on Electronics, Circuits and Systems,
Petra, Nicola ; Willson, Alan N. - p. None , 2008
Link: https://doi.org/10.1109/..
 
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6

A programmable 25 MHz to 6 GHz rational-K/L frequency synth..:

, In: 2008 IEEE International Symposium on Circuits and Systems (ISCAS),
Kim, Jae Y. ; Chih-Wei Yao ; Willson, Alan N. - p. None , 2008
Link: https://doi.org/10.1109/..
 
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7

An Energy-efficient Reconfigurable Viterbi Decoder on a Pro..:

, In: 2007 IEEE International Symposium on Circuits and Systems (ISCAS),
Zhong, Guichang ; Willson, Alan N. - p. None , 2007
Link: https://doi.org/10.1109/..
 
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8

The Design of Symmetric Square-Root Pulse-Shaping Filters f..:

, In: 2007 IEEE International Symposium on Circuits and Systems (ISCAS),
Yao, Chia-Yu ; Willson, Alan N. - p. None , 2007
Link: https://doi.org/10.1109/..
 
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9

Low-latency Memory-efficient 150-Mbps Turbo FEC Encoder and..:

, In: 2007 IEEE International Symposium on Circuits and Systems (ISCAS),
Kuo, Tzu-Chieh ; Willson, Alan N. - p. None , 2007
Link: https://doi.org/10.1109/..
 
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10

Joint module selection and retiming with carry-save represe..:

, In: 2000 10th European Signal Processing Conference,
Yu, Zhan ; Khoo, Kei-Yong ; Willson, Alan N. - p. 1-4 , 2000
Link: https://doi.org/10.1145/..
 
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11

Signal representation guided synthesis using carry-save add..:

, In: Proceedings of the 38th annual Design Automation Conference,
Yu, Zhan ; Yu, Meng-Lin ; Willson Jr., Alan N. - p. 456-461 , 2001
Link: https://dl.acm.org/doi/1..
 
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12

The use of carry-save representation in joint module select..:

, In: Proceedings of the 37th Annual Design Automation Conference,
Yu, Zhan ; Khoo, Kei-Yong ; Willson Jr., Alan N. - p. 768-773 , 2000
Link: https://dl.acm.org/doi/1..
 
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13

Biased two's complement representation for low-power DSP sy..:

Khoo, Kei-Yong ; Chen, Chao-Liang ; Willson Jr., Alan N.
Computer Standards & Interfaces.  20 (1999)  6-7 - p. 442 , 1999
Link: https://doi.org/10.1016/..
 
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14

Bit-level arithmetic optimization for carry-save additions:

, In: Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design,
Khoo, Kei-Yong ; Yu, Zhan ; Willson Jr., Alan N. - p. 14-19 , 1999
Link: https://dl.acm.org/doi/1..
 
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15

Translstor circuits and potentially stable operating points:

Green, Michael M. ; Willson Jr., Alan N.
Linear Algebra and its Applications.  223-224 (1995)  - p. 267-283 , 1995
Link: https://doi.org/10.1016/..
 
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