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2008 IEEE International Symposium on Circuits and Systems (ISCAS) ,
1
Leakage power optimization for clock network using dual-Vth..:
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48th Midwest Symposium on Circuits and Systems, 2005. ,
2
3D CBL: an efficient algorithm for general 3D packing probl..:
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2005 6th International Conference on ASIC ,
3
Congestion and performance driven full-chip scalable routin..:
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ASIC, 2003. Proceedings. 5th International Conference on ,
4
Floorplanning with soft rectilinear blocks using corner blo..:
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ASIC, 2003. Proceedings. 5th International Conference on ,
5
An efficient search space smoothing based netlist partition..:
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ASIC, 2003. Proceedings. 5th International Conference on ,
6
Standard-cell based data-path placement utilizing regularit:
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ASIC, 2003. Proceedings. 5th International Conference on ,
7
Incremental placement algorithm for multi-objective optimiz..:
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ASIC, 2003. Proceedings. 5th International Conference on ,
8
Performance optimization global routing with RLC crosstalk ..:
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ASIC, 2003. Proceedings. 5th International Conference on ,
9
Two-dimensional common-centroid stack generation algorithms..:
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ASIC, 2003. Proceedings. 5th International Conference on ,
10
A fast simulating algorithm for power/ground network with t..:
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ASIC, 2003. Proceedings. 5th International Conference on ,
11
Congestion based layer assignment of global routing:
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ASIC, 2003. Proceedings. 5th International Conference on ,
12
Reliable buffered clock tree routing algorithm with process..:
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ASIC, 2003. Proceedings. 5th International Conference on ,
13
Path-based timing optimization by buffer insertion with acc..:
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ASIC, 2003. Proceedings. 5th International Conference on ,
14
An O(nloglogn) algorithm for evaluation of Bounded Slice-li..:
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ASIC, 2003. Proceedings. 5th International Conference on ,
15