de Albuquerque, T. Chaves
1109  results:
Search for persons X
?
1

40-nm RFSOI technology exhibiting 90fs RON × COFF and fT/fM..:

, In: ESSDERC 2023 - IEEE 53rd European Solid-State Device Research Conference (ESSDERC),
Cremer, S. ; Pelloux, N. ; Gianesello, F.... - p. 101-104 , 2023
 
?
2

Lowering the Dark Count Rate of SPAD Implemented in CMOS FD..:

, In: 2019 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS),
 
?
3

3D Silicon Coincidence Avalanche Detector (3D-SiCAD) for ch..:

Vignetti, M.M. ; Calmon, F. ; Pittet, P....
Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment.  881 (2018)  - p. 53-59 , 2018
 
?
4

Lowering the Dark Count Rate of SPAD Implemented in CMOS FD..:

Chaves de Albuquerque, T ; Issartel, D ; Clerc, R...
info:eu-repo/semantics/altIdentifier/doi/10.1109/EUROSOI-ULIS45800.2019.9041916.  , 2019
 
?
5

Lowering the Dark Count Rate of SPAD Implemented in CMOS FD..:

Chaves de Albuquerque, T ; Issartel, D ; Clerc, R...
info:eu-repo/semantics/altIdentifier/doi/10.1109/EUROSOI-ULIS45800.2019.9041916.  , 2019
 
?
6

Lowering the Dark Count Rate of SPAD Implemented in CMOS FD..:

Chaves de Albuquerque, T ; Issartel, D ; Clerc, R...
info:eu-repo/semantics/altIdentifier/doi/10.1109/EUROSOI-ULIS45800.2019.9041916.  , 2019
 
?
7

Lowering the Dark Count Rate of SPAD Implemented in CMOS FD..:

Chaves de Albuquerque, T ; Issartel, D ; Clerc, R...
info:eu-repo/semantics/altIdentifier/doi/10.1109/EUROSOI-ULIS45800.2019.9041916.  , 2019
 
?
8

Lowering the Dark Count Rate of SPAD Implemented in CMOS FD..:

Chaves de Albuquerque, T ; Issartel, D ; Clerc, R...
info:eu-repo/semantics/altIdentifier/doi/10.1109/EUROSOI-ULIS45800.2019.9041916.  , 2019
 
?
9

Lowering the Dark Count Rate of SPAD Implemented in CMOS FD..:

Chaves de Albuquerque, T ; Issartel, D ; Clerc, R...
info:eu-repo/semantics/altIdentifier/doi/10.1109/EUROSOI-ULIS45800.2019.9041916.  , 2019
 
?
10

Lowering the Dark Count Rate of SPAD Implemented in CMOS FD..:

Chaves de Albuquerque, T ; Issartel, D ; Clerc, R...
info:eu-repo/semantics/altIdentifier/doi/10.1109/EUROSOI-ULIS45800.2019.9041916.  , 2019
 
?
11

Lowering the Dark Count Rate of SPAD Implemented in CMOS FD..:

Chaves de Albuquerque, T ; Issartel, D ; Clerc, R...
info:eu-repo/semantics/altIdentifier/doi/10.1109/EUROSOI-ULIS45800.2019.9041916.  , 2019
 
?
12

3D Silicon Coincidence Avalanche Detector (3D-SiCAD) for ch..:

Vignetti, M.M ; Calmon, F ; Pittet, P...
info:eu-repo/semantics/altIdentifier/doi/10.1016/j.nima.2017.10.089.  , 2018
 
?
13

3D Silicon Coincidence Avalanche Detector (3D-SiCAD) for ch..:

Vignetti, M.M ; Calmon, F ; Pittet, P...
info:eu-repo/semantics/altIdentifier/doi/10.1016/j.nima.2017.10.089.  , 2018
 
?
14

3D Silicon Coincidence Avalanche Detector (3D-SiCAD) for ch..:

Vignetti, M.M ; Calmon, F ; Pittet, P...
info:eu-repo/semantics/altIdentifier/doi/10.1016/j.nima.2017.10.089.  , 2018
 
?
15

3D Silicon Coincidence Avalanche Detector (3D-SiCAD) for ch..:

Vignetti, M.M ; Calmon, F ; Pittet, P...
info:eu-repo/semantics/altIdentifier/doi/10.1016/j.nima.2017.10.089.  , 2018
 
1-15