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Digital design
with an introduction to the verilog HDL, VHDL, and system V...
Copies:
Zentrale:E02 a inf 110 hdl/173(6)
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Prozessorentwurf mit VHDL
Modellierung und Synthese eines 12-Bit-Mikroprozessors
De Gruyter Oldenbourg Studium
Copies:
Zentrale:E02 a inf 110 hdl/855; TB BHV: com 260/22
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Digitaltechnik
eine Einführung mit VHDL
De Gruyter Studium
Copies:
TB BHV: com 260/14(4); Zentrale:E02 a inf 110 hdl/396(4)
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Languages, design methods, and tools for electronic system ..
selected contributionsfrom FDL 2015
Lecture notes in electrical engineering ; 385
Copies:
Zentrale:Magazin 02.s.5401
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Effective coding with VHDL
principles and best practice
Copies:
Zentrale:E02 a inf 110 hdl/556; TB BHV: com 260/25
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Prozessorentwurf
von der Planung bis zum Prototyp
Studium
Copies:
Zentrale:E02 a inf 110 hdl/853; TB BHV: com 260/18(2)
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9
SystemVerilog assertions and functional coverage
guide to language, methodology and applications
Copies:
Zentrale:E02 a inf 110 hdl/568
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Finite state machines in hardware
theory and design (with VHDL and SystemVerilog)
Copies:
Zentrale:E02 a inf 110 hdl/263
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Guide to FPGA Implementation of Arithmetic Functions
Lecture Notes in Electrical Engineering ; 149
Copies:
Zentrale:E02 a inf 110 hdl/849
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SystemVerilog for verification
a guide to learning the testbench language features
Copies:
Zentrale:E02 a inf 110 hdl/410
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