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1 Ergebnisse
1
Prozessorentwurf mit VHDL
Modellierung und Synthese eines 12-Bit-Mikroprozessors De Gruyter Studium
Wecker, Dieter
, [2018]
Link:
https://doi.org/10.1515/9783110583069
Exemplar:
Zentrale:E02
a inf 110 hdl/855;
TB BHV
: com 260/22
RT Book, Whole T1 <Title>Prozessorentwurf mit VHDL</Title> : <SubTitle>Modellierung und Synthese eines 12-Bit-Mikroprozessors</SubTitle> UL https://suche.suub.uni-bremen.de/peid=B102854010&Exemplar=1&LAN=DE A1 Wecker, Dieter PB De Gruyter Oldenbourg PP München YR 2018 NO 1 Online-Ressource (VIII, 210 Seiten) T3 De Gruyter Studium SN 9783110583069 SN 9783110582833 LK http://dx.doi.org/https://doi.org/10.1515/9783110583069 DO https://doi.org/10.1515/9783110583069 LK http://dx.doi.org/10.1515/9783110583069 DO 10.1515/9783110583069 LK http://https://doi.org/10.1515/9783110583069 LK http://katalog.suub.uni-bremen.de/DB=1/LNG=DU/CMD?ACT=SRCHA&IKT=8000&TRM=1773143247* CN E02: a inf 110 hdl/855 CN TB BHV: com 260/22 SF ELIB - SuUB Bremen
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