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Multiple-valued logic in VLSI design
IEEE Computer Society Press technology series
Butler, Jon T.
, c1991
Exemplar:
Zentrale:E02
a inf 130 m/433
RT Book, Whole T1
Multiple-valued logic in VLSI design
UL https://suche.suub.uni-bremen.de/peid=B11514420&Exemplar=1&LAN=DE A1 Butler, Jon T. PB IEEE Computer Society Press PP Los Alamitos, Calif YR 1991 NO vii, 120 p ; 28 cm : ill T3 IEEE Computer Society Press technology series SN 0818621273 SN 0818691271 SN 0818661275 SN 9780818661273 LK http://katalog.suub.uni-bremen.de/DB=1/LNG=DU/CMD?ACT=SRCHA&IKT=8000&TRM=16595162* CN E02: a inf 130 m/433 SF ELIB - SuUB Bremen
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