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1 Ergebnisse
1
Single-Chip MPEG-2 422P@HL CODEC LSI with Multi-Chip Config..:
, In:
Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
,
Iwasaki, Hiroe
;
Naganuma, Jiro
;
Nitta, Koyo
... - p. 20002 ff. , 2003
Link:
https://dl.acm.org/doi/10.5555/1022685.1022917
RT T1
Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
: T1
Single-Chip MPEG-2 422P@HL CODEC LSI with Multi-Chip Configuration for Large Scale Processing beyond HDTV Level
UL https://suche.suub.uni-bremen.de/peid=acm-1022917&Exemplar=1&LAN=DE A1 Iwasaki, Hiroe A1 Naganuma, Jiro A1 Nitta, Koyo A1 Nakamura, Ken A1 Yoshitome, Takeshi A1 Ogura, Mitsuo A1 Nakajima, Yasuyuki A1 Tashiro, Yutaka A1 Onishi, Takayuki A1 Ikeda, Mitsuo A1 Endo, Makoto PB IEEE Computer Society YR 2003 K1 Computer systems organization K1 Architectures K1 Parallel architectures K1 Single instruction, multiple data K1 Applied computing K1 Physical sciences and engineering K1 Electronics SP 20002 ff. LK http://dx.doi.org/https://dl.acm.org/doi/10.5555/1022685.1022917 DO https://dl.acm.org/doi/10.5555/1022685.1022917 SF ELIB - SuUB Bremen
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