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1 Ergebnisse
1
A Practical Approach for Bus Architecture Optimization at T..:
, In:
Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
,
Ogawa, Osamu
;
de Noyer, Sylvain Bayon
;
Chauvet, Pascal
... - p. 20176 ff. , 2003
Link:
https://dl.acm.org/doi/10.5555/1022685.1022946
RT T1 <cTitle>Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2</cTitle>: T1 <Title>A Practical Approach for Bus Architecture Optimization at Transaction Level</Title> UL https://suche.suub.uni-bremen.de/peid=acm-1022946&Exemplar=1&LAN=DE A1 Ogawa, Osamu A1 de Noyer, Sylvain Bayon A1 Chauvet, Pascal A1 Shinohara, Katsuya A1 Watanabe, Yoshiharu A1 Niizuma, Hiroshi A1 Sasaki, Takayuki A1 Takai, Yuji PB IEEE Computer Society YR 2003 K1 Hardware K1 Very large scale integration design K1 Application-specific VLSI designs K1 Application specific processors K1 Communication hardware, interfaces and storage K1 Buses and high-speed links K1 Information systems K1 Information systems applications K1 Multimedia information systems SP 20176 ff. LK http://dx.doi.org/https://dl.acm.org/doi/10.5555/1022685.1022946 DO https://dl.acm.org/doi/10.5555/1022685.1022946 SF ELIB - SuUB Bremen
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