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1 Ergebnisse
1
Framework for Fault Analysis and Test Generation in DRAMs:
, In:
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
,
Al-Ars, Zaid
;
Hamdioui, Said
;
Mueller, Georg
. - p. 1020-1021 , 2005
Link:
https://dl.acm.org/doi/10.1109/DATE.2005.161
RT T1
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
: T1
Framework for Fault Analysis and Test Generation in DRAMs
UL https://suche.suub.uni-bremen.de/peid=acm-1049265&Exemplar=1&LAN=DE A1 Al-Ars, Zaid A1 Hamdioui, Said A1 Mueller, Georg A1 Goor, Ad J.van de PB IEEE Computer Society YR 2005 K1 DRAM testing K1 defect simulation K1 faulty behavior K1 test generation K1 tool framework K1 Hardware K1 Integrated circuits K1 Semiconductor memory K1 Dynamic memory K1 Robustness K1 Hardware test SP 1020 OP 1021 LK http://dx.doi.org/https://dl.acm.org/doi/10.1109/DATE.2005.161 DO https://dl.acm.org/doi/10.1109/DATE.2005.161 SF ELIB - SuUB Bremen
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