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On the Optimal Design of Triple Modular Redundancy Logic fo..:
, In:
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
,
Kastensmidt, F. Lima
;
Sterpone, L.
;
Carro, L.
. - p. 1290-1295 , 2005
Link:
https://dl.acm.org/doi/10.1109/DATE.2005.229
RT T1 <cTitle>Proceedings of the conference on Design, Automation and Test in Europe - Volume 2</cTitle>: T1 <Title>On the Optimal Design of Triple Modular Redundancy Logic for SRAM-based FPGAs</Title> UL https://suche.suub.uni-bremen.de/peid=acm-1049313&Exemplar=1&LAN=DE A1 Kastensmidt, F. Lima A1 Sterpone, L. A1 Carro, L. A1 Reorda, M. Sonza PB IEEE Computer Society YR 2005 K1 Computer systems organization K1 Architectures K1 Other architectures K1 Reconfigurable computing K1 Self-organizing autonomic computing K1 Hardware K1 Very large scale integration design K1 Application-specific VLSI designs K1 Robustness K1 Integrated circuits K1 Semiconductor memory K1 Static memory K1 Hardware test SP 1290 OP 1295 LK http://dx.doi.org/https://dl.acm.org/doi/10.1109/DATE.2005.229 DO https://dl.acm.org/doi/10.1109/DATE.2005.229 SF ELIB - SuUB Bremen
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