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1 Ergebnisse
1
Energy-aware fetch mechanism : trace cache and BTB custo..:
, In:
Proceedings of the 2005 international symposium on Low power electronics and design
,
Chaver, Daniel
;
Rojas, Miguel A.
;
Pinuel, Luis
... - p. 42-47 , 2005
Link:
https://dl.acm.org/doi/10.1145/1077603.1077615
RT T1
Proceedings of the 2005 international symposium on Low power electronics and design
: T1
Energy-aware fetch mechanism : trace cache and BTB customization
UL https://suche.suub.uni-bremen.de/peid=acm-1077615&Exemplar=1&LAN=DE A1 Chaver, Daniel A1 Rojas, Miguel A. A1 Pinuel, Luis A1 Prieto, Manuel A1 Tirado, Francisco A1 Huang, Michael C. PB ACM YR 2005 K1 adaptive K1 instruction fetch K1 profiling K1 Computer systems organization K1 Architectures K1 Other architectures K1 Reconfigurable computing K1 Self-organizing autonomic computing SP 42 OP 47 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/1077603.1077615 DO https://dl.acm.org/doi/10.1145/1077603.1077615 SF ELIB - SuUB Bremen
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