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1 Ergebnisse
1
FPGA architecture for static background subtraction in real..:
, In:
Proceedings of the 19th annual symposium on Integrated circuits and systems design
,
Oliveira, Jozias
;
Printes, André
;
Freire, R. C. S
.. - p. 26-31 , 2006
Link:
https://dl.acm.org/doi/10.1145/1150343.1150356
RT T1
Proceedings of the 19th annual symposium on Integrated circuits and systems design
: T1
FPGA architecture for static background subtraction in real time
UL https://suche.suub.uni-bremen.de/peid=acm-1150356&Exemplar=1&LAN=DE A1 Oliveira, Jozias A1 Printes, André A1 Freire, R. C. S A1 Melcher, Elmar A1 Silva, Ivan S. S. PB ACM YR 2006 K1 FPGA K1 background subtraction K1 real time K1 Hardware K1 Electronic design automation K1 High-level and register-transfer level synthesis K1 Hardware-software codesign K1 Datapath optimization K1 Computing methodologies K1 Artificial intelligence K1 Computer vision K1 Computer vision problems K1 Interest point and salient region detections SP 26 OP 31 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/1150343.1150356 DO https://dl.acm.org/doi/10.1145/1150343.1150356 SF ELIB - SuUB Bremen
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