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Mapping of image processing systems to FPGA computer based ..:
, In:
Proceedings of the 19th annual symposium on Integrated circuits and systems design
,
do Nascimento, Paulo Sérgio B.
;
de Lima, Manoel E.
;
da Silva, Stelita M.
. - p. 50-55 , 2006
Link:
https://dl.acm.org/doi/10.1145/1150343.1150361
RT T1
Proceedings of the 19th annual symposium on Integrated circuits and systems design
: T1
Mapping of image processing systems to FPGA computer based on temporal partitioning and design space exploration
UL https://suche.suub.uni-bremen.de/peid=acm-1150361&Exemplar=1&LAN=DE A1 do Nascimento, Paulo Sérgio B. A1 de Lima, Manoel E. A1 da Silva, Stelita M. A1 Seixas, Jordana L. PB ACM YR 2006 K1 FPGA-computers K1 area-time trade-offs K1 design space exploration K1 image processing K1 temporal partitioning techniques K1 Hardware K1 Electronic design automation K1 High-level and register-transfer level synthesis K1 Logic synthesis K1 Circuit optimization SP 50 OP 55 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/1150343.1150361 DO https://dl.acm.org/doi/10.1145/1150343.1150361 SF ELIB - SuUB Bremen
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