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1 Ergebnisse
1
Sub-threshold design : the challenges of minimizing circ..:
, In:
Proceedings of the 2006 international symposium on Low power electronics and design
,
Calhoun, B. H.
;
Wang, A.
;
Verma, N.
. - p. 366-368 , 2006
Link:
https://dl.acm.org/doi/10.1145/1165573.1165661
RT T1
Proceedings of the 2006 international symposium on Low power electronics and design
: T1
Sub-threshold design : the challenges of minimizing circuit energy
UL https://suche.suub.uni-bremen.de/peid=acm-1165661&Exemplar=1&LAN=DE A1 Calhoun, B. H. A1 Wang, A. A1 Verma, N. A1 Chandrakasan, A. PB ACM YR 2006 K1 dynamic voltage scaling K1 low voltage memory K1 process variations K1 sub-threshold digital circuits K1 sub-threshold logic K1 Hardware K1 Emerging technologies K1 Very large scale integration design SP 366 OP 368 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/1165573.1165661 DO https://dl.acm.org/doi/10.1145/1165573.1165661 SF ELIB - SuUB Bremen
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