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TMA : a trap-based memory architecture:

, In: Proceedings of the 20th annual international conference on Supercomputing,

Zeffer, Håkan ; Radović, Zoran ; Karlsson, Martin. - p. 259-268 , 2006

Link: https://dl.acm.org/doi/10.1145/1183401.1183438

RT 
T1 <cTitle>Proceedings of the 20th annual international conference on Supercomputing</cTitle>: T1 <Title>TMA				: a trap-based memory architecture</Title>

UL https://suche.suub.uni-bremen.de/peid=acm-1183438&Exemplar=1&LAN=DE
				
A1 Zeffer, Håkan
A1 Radović, Zoran
A1 Karlsson, Martin
A1 Hagersten, Erik
PB ACM
YR 2006
K1 chip multi processor (CMP)
K1 distributed shared memory (DSM)
K1 low complexity server design
K1 node coherence checks
K1 server design
K1 simultaneous multi-threading (SMT)
K1 software coherence
K1 trap-based memory architecture (TMA)
K1 General and reference
K1 Cross-computing tools and techniques
K1 Design
K1 Information systems
K1 Data management systems
K1 Middleware for databases
K1 Application servers
K1 Computer systems organization
K1 Architectures
K1 Distributed architectures
K1 Client-server architectures
K1 Computing methodologies
K1 Modeling and simulation
K1 Simulation types and techniques
K1 Massively parallel and high-performance simulations
K1 Serial architectures
K1 Superscalar architectures
K1 Grid computing
K1 Parallel architectures
K1 Multicore architectures
K1 Database web servers
K1 Software and its engineering
K1 Software organization and properties
K1 Software system structures
K1 Distributed systems organizing principles
SP 259
OP 268
LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/1183401.1183438
DO https://dl.acm.org/doi/10.1145/1183401.1183438
SF ELIB - SuUB Bremen

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