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1 Ergebnisse
1
Critical charge and set pulse widths for combinational logi..:
, In:
Proceedings of the 17th ACM Great Lakes symposium on VLSI
,
Naseer, Riaz
;
Draper, Jeff
;
Boulghassoul, Younes
.. - p. 227-230 , 2007
Link:
https://dl.acm.org/doi/10.1145/1228784.1228843
RT T1
Proceedings of the 17th ACM Great Lakes symposium on VLSI
: T1
Critical charge and set pulse widths for combinational logic in commercial 90nm cmos technology
UL https://suche.suub.uni-bremen.de/peid=acm-1228843&Exemplar=1&LAN=DE A1 Naseer, Riaz A1 Draper, Jeff A1 Boulghassoul, Younes A1 DasGupta, Sandeepan A1 Witulski, Art PB ACM YR 2007 K1 critical charge K1 single event transient K1 soft error K1 Hardware K1 Hardware validation K1 Functional verification K1 Simulation and emulation SP 227 OP 230 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/1228784.1228843 DO https://dl.acm.org/doi/10.1145/1228784.1228843 SF ELIB - SuUB Bremen
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