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1 Ergebnisse
1
Verifying full-custom multipliers by Boolean equivalence ch..:
, In:
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
,
Krautz, Udo
;
Wedler, Markus
;
Kunz, Wolfgang
... - p. 398-403 , 2008
Link:
https://dl.acm.org/doi/10.5555/1356802.1356902
RT T1 <cTitle>Proceedings of the 2008 Asia and South Pacific Design Automation Conference</cTitle>: T1 <Title>Verifying full-custom multipliers by Boolean equivalence checking and an arithmetic bit level proof</Title> UL https://suche.suub.uni-bremen.de/peid=acm-1356902&Exemplar=1&LAN=DE A1 Krautz, Udo A1 Wedler, Markus A1 Kunz, Wolfgang A1 Weber, Kai A1 Jacobi, Christian A1 Pflanz, Matthias PB IEEE Computer Society Press YR 2008 K1 algorithm K1 formal verification K1 Hardware K1 Integrated circuits K1 Logic circuits K1 Arithmetic and datapath circuits K1 Hardware test K1 Robustness K1 Hardware validation SP 398 OP 403 LK http://dx.doi.org/https://dl.acm.org/doi/10.5555/1356802.1356902 DO https://dl.acm.org/doi/10.5555/1356802.1356902 SF ELIB - SuUB Bremen
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