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1 Ergebnisse
1
FaCSim : a fast and cycle-accurate architecture simulato..:
, In:
Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems
,
Lee, Jaejin
;
Kim, Junghyun
;
Jang, Choonki
... - p. 89-100 , 2008
Link:
https://dl.acm.org/doi/10.1145/1375657.1375670
RT T1 <cTitle>Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems</cTitle>: T1 <Title>FaCSim : a fast and cycle-accurate architecture simulator for embedded systems</Title> UL https://suche.suub.uni-bremen.de/peid=acm-1375670&Exemplar=1&LAN=DE A1 Lee, Jaejin A1 Kim, Junghyun A1 Jang, Choonki A1 Kim, Seungkyun A1 Egger, Bernhard A1 Kim, Kwangsub A1 Han, SangYong PB ACM YR 2008 K1 architecture simulator K1 cycle-accurate simulation K1 full-system simulation K1 simulator parallelization K1 virtual prototyping K1 Computing methodologies K1 Modeling and simulation K1 Model development and analysis K1 Modeling methodologies SP 89 OP 100 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/1375657.1375670 DO https://dl.acm.org/doi/10.1145/1375657.1375670 SF ELIB - SuUB Bremen
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