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Code generation schema for modulo scheduled loops:

, In: Proceedings of the 25th annual international symposium on Microarchitecture,

Rau, B. Ramakrishna ; Schlansker, Michael S. ; Tirumalai, P. P. - p. 158-169 , 1992

Link: https://dl.acm.org/doi/10.5555/144953.145795

RT 
T1 <cTitle>Proceedings of the 25th annual international symposium on Microarchitecture</cTitle>: T1 <Title>Code generation schema for modulo scheduled loops</Title>

UL https://suche.suub.uni-bremen.de/peid=acm-145795&Exemplar=1&LAN=DE
				
A1 Rau, B. Ramakrishna
A1 Schlansker, Michael S.
A1 Tirumalai, P. P.
PB IEEE Computer Society Press
YR 1992
K1 Hardware
K1 Very large scale integration design
K1 Application-specific VLSI designs
K1 Application specific instruction set processors
K1 Theory of computation
K1 Design and analysis of algorithms
K1 Online algorithms
K1 Online learning algorithms
K1 Scheduling algorithms
K1 Software and its engineering
K1 Software notations and tools
K1 Compilers
K1 Source code generation
K1 Integrated circuits
K1 Logic circuits
K1 Emerging technologies
K1 Analysis and design of emerging devices and systems
K1 Emerging languages and compilers
K1 Approximation algorithms analysis
K1 Theory and algorithms for application domains
K1 Machine learning theory
K1 Reinforcement learning
K1 Sequential decision making
SP 158
OP 169
LK http://dx.doi.org/https://dl.acm.org/doi/10.5555/144953.145795
DO https://dl.acm.org/doi/10.5555/144953.145795
SF ELIB - SuUB Bremen

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