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1
HLSIM—a new hierarchical logic simulator and netlist conver..:
, In:
Proceedings of the 29th ACM/IEEE Design Automation Conference
,
Zein, D. Z.
;
Engel, O. P.
;
Ditlow, G.
- p. 432-437 , 1992
Link:
https://dl.acm.org/doi/10.5555/113938.149561
RT T1 <cTitle>Proceedings of the 29th ACM/IEEE Design Automation Conference</cTitle>: T1 <Title>HLSIM—a new hierarchical logic simulator and netlist converter</Title> UL https://suche.suub.uni-bremen.de/peid=acm-149561&Exemplar=1&LAN=DE A1 Zein, D. Z. A1 Engel, O. P. A1 Ditlow, G. PB IEEE Computer Society Press YR 1992 K1 Computing methodologies K1 Modeling and simulation K1 Simulation support systems K1 Applied computing K1 Arts and humanities K1 Architecture (buildings) K1 Computer-aided design K1 Hardware K1 Hardware validation K1 Functional verification K1 Simulation and emulation K1 Very large scale integration design K1 Physical sciences and engineering K1 Engineering K1 Simulation types and techniques K1 Discrete-event simulation SP 432 OP 437 LK http://dx.doi.org/https://dl.acm.org/doi/10.5555/113938.149561 DO https://dl.acm.org/doi/10.5555/113938.149561 SF ELIB - SuUB Bremen
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